From b9b42bd93e882705311de6e6f26b9c9d7ff582ca Mon Sep 17 00:00:00 2001
From: RainerWasserfuhr <wasserfuhr@yahoo.com>
Date: Fri, 5 Aug 2016 21:49:20 +0200
Subject: [PATCH] fixed sort order

---
 docs/chip_glossary.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/chip_glossary.md b/docs/chip_glossary.md
index 7d6d309..b33ef1b 100644
--- a/docs/chip_glossary.md
+++ b/docs/chip_glossary.md
@@ -161,9 +161,9 @@ Chip Design Glossary
 * [Synchronous logic](https://en.wikipedia.org/wiki/Synchronous_circuit): Logic whose state is controlled by a synchronous clock.
 * [Synthesis](https://en.wikipedia.org/wiki/Logic_synthesis): Translation of high level design description (e.g. Verilog) to a netlist format (e.g. standard cell gate level).
 * [SystemC](https://en.wikipedia.org/wiki/SystemC): Set of C++ classes and macros for simulation. Commonly used for high level modeling and testing.
-* [Transistor](https://en.wikipedia.org/wiki/Transistor): A semiconductor device used to amplify/switch electronic signals.
 * [Tape-out](https://en.wikipedia.org/wiki/Tape-out): Act of sending photomask chip database ("layout") to the manufacturer.
 * [TCL](https://en.wikipedia.org/wiki/Tcl): Scripting language used by most of the leading EDA chip design tools.
+* [Transistor](https://en.wikipedia.org/wiki/Transistor): A semiconductor device used to amplify/switch electronic signals.
 * [Verilog](https://en.wikipedia.org/wiki/Verilog): The dominant hardware description language (HDL) for chip design.
 * [VLSI](https://en.wikipedia.org/wiki/Very-large-scale_integration): Very large Integrated Circuit (somewhat outdated term, everything is VLSI today).
 * [Von Neumann architecture](https://en.wikipedia.org/wiki/Von_Neumann_architecture): Computer architecture in which instructions and data are stored in the same memory.