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Adding clock buffer
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@ -140,6 +140,11 @@ module eclocks (/*AUTOARG*/
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.CLKFBIN(lclk_clkfb)
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);
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OBUFDS cclk_obuf (.O (cclk_p),
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.OB (cclk_n),
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.I (cclk)
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);
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`endif // `ifdef TARGET_XILINX
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@ -183,10 +188,7 @@ module eclocks (/*AUTOARG*/
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//cclk (hack for sim)
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assign cclk_p = hard_reset ? clkin :
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cclk_bp ? pll_bypass[0] :
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cclk;
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assign cclk_n = ~cclk_p;
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//lclk (hack for sim)
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assign tx_lclk = hard_reset ? clkin :
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