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Returning to 10 step processs

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-empty scripts compiles..good start
-this is starting to feel solid
This commit is contained in:
Andreas Olofsson 2016-02-16 12:40:10 -05:00
parent 9d4f970d88
commit c8af4a257b
20 changed files with 38 additions and 36 deletions
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2
chip/synthesis/01_setup_tool.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/01_setup_tool.tcl

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chip/synthesis/02_read_design.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/02_read_design.tcl

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chip/synthesis/03_read_constraints.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/03_read_constraints.tcl

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chip/synthesis/03_read_design.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/04_read_design.tcl

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chip/synthesis/04_read_constraints.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/05_read_constraints.tcl

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chip/synthesis/04_setup_corners.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/06_setup_corners.tcl
source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/04_setup_corners.tcl

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chip/synthesis/05_floorplan.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/05_floorplan.tcl

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chip/synthesis/06_check_design.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/06_check_design.tcl

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chip/synthesis/06_floorplan.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/07_floorplan.tcl

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chip/synthesis/07_check_design.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/08_check_design.tcl

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chip/synthesis/07_compile.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/07_compile.tcl

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chip/synthesis/08_compile.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/09_compile.tcl

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chip/synthesis/08_dft.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/08_dft.tcl

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chip/synthesis/09_compile.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/10_dft.tcl

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chip/synthesis/09_optimize.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/09_optimize.tcl

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chip/synthesis/10_optimize.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/11_optimize.tcl

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chip/synthesis/10_write_netlist.tcl Normal file
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/10_write_netlist.tcl

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chip/synthesis/11_write_netlist.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/12_write_netlist.tcl

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chip/synthesis/run.tcl
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#set LOCALPATH [file dirname [ info script ]]
set LOCALPATH "."
################################
# STEP1: SETUP PROCESS
# SETUP PROCESS
################################
source $LOCALPATH/01_setup_process.tcl
source $LOCALPATH/setup_process.tcl
################################
# STEP2: SETUP TOOL
# STEP1: SETUP TOOL
################################
source $LOCALPATH/02_setup_tool.tcl
source $LOCALPATH/01_setup_tool.tcl
################################
# STEP3: READ DESIGN FILES
# STEP2: READ DESIGN FILES
################################
source $LOCALPATH/03_read_design.tcl
source $LOCALPATH/02_read_design.tcl
################################
# STEP4: READ CONSTRAINTS
# STEP3: READ CONSTRAINTS
################################
source $LOCALPATH/04_read_constraints.tcl
source $LOCALPATH/03_read_constraints.tcl
################################
# STEP5: SETUP CORNERS
# STEP4: SETUP CORNERS
################################
source $LOCALPATH/05_setup_corners.tcl
source $LOCALPATH/04_setup_corners.tcl
################################
# STEP6: READ FLROOPLAN
# STEP5: READ FLROOPLAN
################################
source $LOCALPATH/06_floorplan.tcl
source $LOCALPATH/05_floorplan.tcl
################################
# STEP7: CHECK DESIGN
# STEP6: CHECK DESIGN
################################
source $LOCALPATH/07_check_design.tcl
source $LOCALPATH/06_check_design.tcl
################################
# STEP8: COMPILE
# STEP7: COMPILE
################################
source $LOCALPATH/08_compile.tcl
source $LOCALPATH/07_compile.tcl
################################
# STEP9: DFT
# STEP8: DFT
################################
source $LOCALPATH/09_dft.tcl
source $LOCALPATH/08_dft.tcl
################################
# STEP10: OPTIMIZE
# STEP9: OPTIMIZE
################################
source $LOCALPATH/10_optimize.tcl
source $LOCALPATH/09_optimize.tcl
################################
# STEP11: WRITE NETLIST (AND OTHER FILES)
# STEP10: WRITE NETLIST (AND OTHER FILES)
################################
source $LOCALPATH/11_write_netlist.tcl
source $LOCALPATH/10_write_netlist.tcl
#exit

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chip/synthesis/01_setup_process.tcl → chip/synthesis/setup_process.tcl
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