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mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00

Fixed file locations

This commit is contained in:
Patrik Lindström 2015-06-30 14:12:04 +02:00
parent a284dff462
commit d0d6cc0d4a

View File

@ -2792,143 +2792,143 @@
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/memory_dp.v</spirit:name>
<spirit:name>../../memory/hdl/memory_dp.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emesh/hdl/packet2emesh.v</spirit:name>
<spirit:name>../../emesh/hdl/packet2emesh.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emesh/hdl/emesh2packet.v</spirit:name>
<spirit:name>../../emesh/hdl/emesh2packet.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/arbiter_priority.v</spirit:name>
<spirit:name>../../common/hdl/arbiter_priority.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/synchronizer.v</spirit:name>
<spirit:name>../../common/hdl/synchronizer.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emmu/hdl/emmu.v</spirit:name>
<spirit:name>../../emmu/hdl/emmu.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/fifo_cdc.v</spirit:name>
<spirit:name>../../memory/hdl/fifo_cdc.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emailbox/hdl/emailbox.v</spirit:name>
<spirit:name>../../emailbox/hdl/emailbox.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>edma/hdl/edma.v</spirit:name>
<spirit:name>../../edma/hdl/edma.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_arbiter.v</spirit:name>
<spirit:name>../../elink/hdl/erx_arbiter.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/pulse_stretcher.v</spirit:name>
<spirit:name>../../common/hdl/pulse_stretcher.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_protocol.v</spirit:name>
<spirit:name>../../elink/hdl/etx_protocol.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ecfg_if.v</spirit:name>
<spirit:name>../../elink/hdl/ecfg_if.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_remap.v</spirit:name>
<spirit:name>../../elink/hdl/etx_remap.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_protocol.v</spirit:name>
<spirit:name>../../elink/hdl/erx_protocol.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_arbiter.v</spirit:name>
<spirit:name>../../elink/hdl/etx_arbiter.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_cfg.v</spirit:name>
<spirit:name>../../elink/hdl/etx_cfg.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_cfg.v</spirit:name>
<spirit:name>../../elink/hdl/erx_cfg.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_remap.v</spirit:name>
<spirit:name>../../elink/hdl/erx_remap.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_io.v</spirit:name>
<spirit:name>../../elink/hdl/erx_io.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_io.v</spirit:name>
<spirit:name>../../elink/hdl/etx_io.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_fifo.v</spirit:name>
<spirit:name>../../elink/hdl/etx_fifo.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_core.v</spirit:name>
<spirit:name>../../elink/hdl/erx_core.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_core.v</spirit:name>
<spirit:name>../../elink/hdl/etx_core.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_fifo.v</spirit:name>
<spirit:name>../../elink/hdl/erx_fifo.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ecfg_elink.v</spirit:name>
<spirit:name>../../elink/hdl/ecfg_elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx.v</spirit:name>
<spirit:name>../../elink/hdl/etx.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ereset.v</spirit:name>
<spirit:name>../../elink/hdl/ereset.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx.v</spirit:name>
<spirit:name>../../elink/hdl/erx.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/fifo_sync.v</spirit:name>
<spirit:name>../../memory/hdl/fifo_sync.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/elink.v</spirit:name>
<spirit:name>../../elink/hdl/elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/emaxi.v</spirit:name>
<spirit:name>../../elink/hdl/emaxi.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/esaxi.v</spirit:name>
<spirit:name>../../elink/hdl/esaxi.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/eclocks.v</spirit:name>
<spirit:name>../../elink/hdl/eclocks.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/axi_elink.v</spirit:name>
<spirit:name>../../elink/hdl/axi_elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
<spirit:userFileType>CHECKSUM_870e4dce</spirit:userFileType>
</spirit:file>
@ -2946,155 +2946,155 @@
<spirit:fileSet>
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
<spirit:file>
<spirit:name>xilibs/ip/fifo_async_104x16.xci</spirit:name>
<spirit:name>../../xilibs/ip/fifo_async_104x16.xci</spirit:name>
<spirit:userFileType>xci</spirit:userFileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/elink_regmap.v</spirit:name>
<spirit:name>../../elink/hdl/elink_regmap.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/fifo_async.v</spirit:name>
<spirit:name>../../memory/hdl/fifo_async.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/memory_dp.v</spirit:name>
<spirit:name>../../memory/hdl/memory_dp.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emesh/hdl/packet2emesh.v</spirit:name>
<spirit:name>../../emesh/hdl/packet2emesh.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emesh/hdl/emesh2packet.v</spirit:name>
<spirit:name>../../emesh/hdl/emesh2packet.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/arbiter_priority.v</spirit:name>
<spirit:name>../../common/hdl/arbiter_priority.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/synchronizer.v</spirit:name>
<spirit:name>../../common/hdl/synchronizer.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emmu/hdl/emmu.v</spirit:name>
<spirit:name>../../emmu/hdl/emmu.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/fifo_cdc.v</spirit:name>
<spirit:name>../../memory/hdl/fifo_cdc.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>emailbox/hdl/emailbox.v</spirit:name>
<spirit:name>../../emailbox/hdl/emailbox.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>edma/hdl/edma.v</spirit:name>
<spirit:name>../../edma/hdl/edma.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_arbiter.v</spirit:name>
<spirit:name>../../elink/hdl/erx_arbiter.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>common/hdl/pulse_stretcher.v</spirit:name>
<spirit:name>../../common/hdl/pulse_stretcher.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_protocol.v</spirit:name>
<spirit:name>../../elink/hdl/etx_protocol.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ecfg_if.v</spirit:name>
<spirit:name>../../elink/hdl/ecfg_if.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_remap.v</spirit:name>
<spirit:name>../../elink/hdl/etx_remap.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_protocol.v</spirit:name>
<spirit:name>../../elink/hdl/erx_protocol.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_arbiter.v</spirit:name>
<spirit:name>../../elink/hdl/etx_arbiter.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_cfg.v</spirit:name>
<spirit:name>../../elink/hdl/etx_cfg.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_cfg.v</spirit:name>
<spirit:name>../../elink/hdl/erx_cfg.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_remap.v</spirit:name>
<spirit:name>../../elink/hdl/erx_remap.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_io.v</spirit:name>
<spirit:name>../../elink/hdl/erx_io.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_io.v</spirit:name>
<spirit:name>../../elink/hdl/etx_io.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_fifo.v</spirit:name>
<spirit:name>../../elink/hdl/etx_fifo.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_core.v</spirit:name>
<spirit:name>../../elink/hdl/erx_core.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx_core.v</spirit:name>
<spirit:name>../../elink/hdl/etx_core.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx_fifo.v</spirit:name>
<spirit:name>../../elink/hdl/erx_fifo.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ecfg_elink.v</spirit:name>
<spirit:name>../../elink/hdl/ecfg_elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/etx.v</spirit:name>
<spirit:name>../../elink/hdl/etx.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/ereset.v</spirit:name>
<spirit:name>../../elink/hdl/ereset.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/erx.v</spirit:name>
<spirit:name>../../elink/hdl/erx.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>memory/hdl/fifo_sync.v</spirit:name>
<spirit:name>../../memory/hdl/fifo_sync.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/elink.v</spirit:name>
<spirit:name>../../elink/hdl/elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/emaxi.v</spirit:name>
<spirit:name>../../elink/hdl/emaxi.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/esaxi.v</spirit:name>
<spirit:name>../../elink/hdl/esaxi.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/eclocks.v</spirit:name>
<spirit:name>../../elink/hdl/eclocks.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
<spirit:file>
<spirit:name>elink/hdl/axi_elink.v</spirit:name>
<spirit:name>../../elink/hdl/axi_elink.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
</spirit:file>
</spirit:fileSet>