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Fixing file permissions
Verilog text files should not have execute permissions!
This commit is contained in:
parent
a6a5de33c2
commit
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axi/hdl/emaxi.v
Executable file → Normal file
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axi/hdl/emaxi.v
Executable file → Normal file
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axi/hdl/emaxi_v1_0_M00_AXI.v
Executable file → Normal file
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axi/hdl/emaxi_v1_0_M00_AXI.v
Executable file → Normal file
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axi/hdl/esaxi.v
Executable file → Normal file
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axi/hdl/esaxi.v
Executable file → Normal file
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axi/hdl/esaxi_v1_0_S00_AXI.v
Executable file → Normal file
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axi/hdl/esaxi_v1_0_S00_AXI.v
Executable file → Normal file
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eclock/hdl/eclock.v
Executable file → Normal file
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eclock/hdl/eclock.v
Executable file → Normal file
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etx/hdl/etx_io.v
Executable file → Normal file
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etx/hdl/etx_io.v
Executable file → Normal file
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memory/hdl/fifo_async.v
Executable file → Normal file
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memory/hdl/fifo_async.v
Executable file → Normal file
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memory/hdl/fifo_sync.v
Executable file → Normal file
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memory/hdl/fifo_sync.v
Executable file → Normal file
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