From d5edb1ca886ce94b1dfed4c5d8243a7eaebe80f9 Mon Sep 17 00:00:00 2001 From: Andreas Olofsson Date: Fri, 4 Dec 2015 03:36:42 -0500 Subject: [PATCH] Fixing priority on etx_arbiter - don't do a combinatorial loopback on wait in a primitive cell, just bad practice... - changed priority to give readback priority over read, safer? --- common/hdl/oh_arbiter_static.v | 4 +--- elink/hdl/etx_arbiter.v | 25 ++++++++++--------------- 2 files changed, 11 insertions(+), 18 deletions(-) diff --git a/common/hdl/oh_arbiter_static.v b/common/hdl/oh_arbiter_static.v index cc6d309..6934967 100644 --- a/common/hdl/oh_arbiter_static.v +++ b/common/hdl/oh_arbiter_static.v @@ -5,7 +5,7 @@ module oh_arbiter_static(/*AUTOARG*/ // Outputs - grants, waits, + grants, // Inputs requests ); @@ -14,7 +14,6 @@ module oh_arbiter_static(/*AUTOARG*/ input [N-1:0] requests; //request vector output [N-1:0] grants; //grant (one hot) - output [N-1:0] waits; //wait mask! genvar j; wire [N-1:0] waitmask; @@ -28,7 +27,6 @@ module oh_arbiter_static(/*AUTOARG*/ //grant circuit assign grants[N-1:0] = requests[N-1:0] & ~waitmask[N-1:0]; - assign waits[N-1:0] = requests[N-1:0] & ~grants[N-1:0]; endmodule // oh_arbiter_priority diff --git a/elink/hdl/etx_arbiter.v b/elink/hdl/etx_arbiter.v index ed8b00c..69129f1 100644 --- a/elink/hdl/etx_arbiter.v +++ b/elink/hdl/etx_arbiter.v @@ -71,10 +71,7 @@ module etx_arbiter (/*AUTOARG*/ wire [PW-1:0] etx_packet_mux; wire txrr_grant; wire txrd_grant; - wire txwr_grant; - wire txrr_arb_wait; - wire txrd_arb_wait; - wire txwr_arb_wait; + wire txwr_grant; wire [PW-1:0] txrd_splice_packet; wire [PW-1:0] txwr_splice_packet; wire [PW-1:0] etx_mux; @@ -106,10 +103,6 @@ module etx_arbiter (/*AUTOARG*/ txrd_grant, txwr_grant //highest priority }), - .waits({txrr_arb_wait, - txrd_arb_wait, - txwr_arb_wait - }), .requests({txrr_access, txrd_access, txwr_access @@ -130,17 +123,19 @@ module etx_arbiter (/*AUTOARG*/ etx_rd_wait | etx_cfg_wait; - //Host read request (self throttling, one read at a time) - assign txrd_wait = etx_rd_wait | - etx_wr_wait | - etx_cfg_wait | - txrd_arb_wait; //Read response assign txrr_wait = etx_wr_wait | etx_rd_wait | etx_cfg_wait | - txrr_arb_wait; - + txwr_access; + + //Host read request (self throttling, one read at a time) + assign txrd_wait = etx_rd_wait | + etx_wr_wait | + etx_cfg_wait | + txrr_access | + txwr_access; + //##################################################################### //# Pipeline stage (arbiter+mux takes time..) //#####################################################################