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Fixing priority on etx_arbiter

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- don't do a combinatorial loopback on wait in a primitive cell, just bad practice...
- changed priority to give readback priority over read, safer?
This commit is contained in:
Andreas Olofsson 2015-12-04 03:36:42 -05:00
parent de012ec9c8
commit d5edb1ca88
2 changed files with 11 additions and 18 deletions
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4
common/hdl/oh_arbiter_static.v
View File

@ -5,7 +5,7 @@
module oh_arbiter_static(/*AUTOARG*/ module oh_arbiter_static(/*AUTOARG*/
// Outputs // Outputs
grants, waits, grants,
// Inputs // Inputs
requests requests
); );
@ -14,7 +14,6 @@ module oh_arbiter_static(/*AUTOARG*/
input [N-1:0] requests; //request vector input [N-1:0] requests; //request vector
output [N-1:0] grants; //grant (one hot) output [N-1:0] grants; //grant (one hot)
output [N-1:0] waits; //wait mask!
genvar j; genvar j;
wire [N-1:0] waitmask; wire [N-1:0] waitmask;
@ -28,7 +27,6 @@ module oh_arbiter_static(/*AUTOARG*/
//grant circuit //grant circuit
assign grants[N-1:0] = requests[N-1:0] & ~waitmask[N-1:0]; assign grants[N-1:0] = requests[N-1:0] & ~waitmask[N-1:0];
assign waits[N-1:0] = requests[N-1:0] & ~grants[N-1:0];
endmodule // oh_arbiter_priority endmodule // oh_arbiter_priority

25
elink/hdl/etx_arbiter.v
View File

@ -71,10 +71,7 @@ module etx_arbiter (/*AUTOARG*/
wire [PW-1:0] etx_packet_mux; wire [PW-1:0] etx_packet_mux;
wire txrr_grant; wire txrr_grant;
wire txrd_grant; wire txrd_grant;
wire txwr_grant; wire txwr_grant;
wire txrr_arb_wait;
wire txrd_arb_wait;
wire txwr_arb_wait;
wire [PW-1:0] txrd_splice_packet; wire [PW-1:0] txrd_splice_packet;
wire [PW-1:0] txwr_splice_packet; wire [PW-1:0] txwr_splice_packet;
wire [PW-1:0] etx_mux; wire [PW-1:0] etx_mux;
@ -106,10 +103,6 @@ module etx_arbiter (/*AUTOARG*/
txrd_grant, txrd_grant,
txwr_grant //highest priority txwr_grant //highest priority
}), }),
.waits({txrr_arb_wait,
txrd_arb_wait,
txwr_arb_wait
}),
.requests({txrr_access, .requests({txrr_access,
txrd_access, txrd_access,
txwr_access txwr_access
@ -130,17 +123,19 @@ module etx_arbiter (/*AUTOARG*/
etx_rd_wait | etx_rd_wait |
etx_cfg_wait; etx_cfg_wait;
//Host read request (self throttling, one read at a time)
assign txrd_wait = etx_rd_wait |
etx_wr_wait |
etx_cfg_wait |
txrd_arb_wait;
//Read response //Read response
assign txrr_wait = etx_wr_wait | assign txrr_wait = etx_wr_wait |
etx_rd_wait | etx_rd_wait |
etx_cfg_wait | etx_cfg_wait |
txrr_arb_wait; txwr_access;
//Host read request (self throttling, one read at a time)
assign txrd_wait = etx_rd_wait |
etx_wr_wait |
etx_cfg_wait |
txrr_access |
txwr_access;
//##################################################################### //#####################################################################
//# Pipeline stage (arbiter+mux takes time..) //# Pipeline stage (arbiter+mux takes time..)
//##################################################################### //#####################################################################