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Register name shuffle

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This commit is contained in:
Andreas Olofsson 2015-04-27 09:28:52 -04:00
parent d44ea5d089
commit d79447853f
4 changed files with 17 additions and 20 deletions
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4
elink/hdl/ecfg_base.v
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@ -76,7 +76,7 @@ module ecfg_base (/*AUTOARG*/
//Config write enables
assign ecfg_reset_write = ecfg_write & (mi_addr[RFAW+1:2]==`ELRESET);
assign ecfg_clk_write = ecfg_write & (mi_addr[RFAW+1:2]==`ELCLK);
assign ecfg_coreid_write = ecfg_write & (mi_addr[RFAW+1:2]==`ELCOREID);
assign ecfg_coreid_write = ecfg_write & (mi_addr[RFAW+1:2]==`ELCHIPID);
assign ecfg_version_write = ecfg_write & (mi_addr[RFAW+1:2]==`ELVERSION);
//###########################
@ -133,7 +133,7 @@ module ecfg_base (/*AUTOARG*/
case(mi_addr[RFAW+1:2])
`ELRESET: mi_dout[31:0] <= {31'b0, ecfg_reset_reg};
`ELCLK: mi_dout[31:0] <= {24'b0, ecfg_clk_reg[7:0]};
`ELCOREID: mi_dout[31:0] <= {20'b0, ecfg_coreid_reg[11:0]};
`ELCHIPID: mi_dout[31:0] <= {20'b0, ecfg_coreid_reg[11:0]};
`ELVERSION: mi_dout[31:0] <= {16'b0, ecfg_version_reg[15:0]};
default: mi_dout[31:0] <= 32'd0;
endcase

2
elink/hdl/ecfg_rx.v
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@ -131,7 +131,7 @@ module ecfg_rx (/*AUTOARG*/
if(ecfg_read)
case(mi_addr[RFAW+1:2])
`ELRXCFG: mi_dout[31:0] <= {ecfg_rx_reg[31:0]};
`ELRXDIN: mi_dout[31:0] <= {23'b0, ecfg_datain_reg[8:0]};
`ELRXGPIO: mi_dout[31:0] <= {23'b0, ecfg_datain_reg[8:0]};
`ELRXBASE: mi_dout[31:0] <= {ecfg_base_reg[31:0]};
default: mi_dout[31:0] <= 32'd0;
endcase

15
elink/hdl/ecfg_tx.v
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@ -54,7 +54,7 @@ module ecfg_tx (/*AUTOARG*/
//registers
reg [9:0] ecfg_tx_config_reg;
reg [10:0] ecfg_tx_config_reg;
reg [8:0] ecfg_tx_gpio_reg;
reg [15:0] ecfg_tx_status_reg;
reg [8:0] ecfg_tx_test_reg;
@ -96,18 +96,17 @@ module ecfg_tx (/*AUTOARG*/
//###########################
always @ (posedge mi_clk)
if(reset)
ecfg_tx_config_reg[9:0] <= 10'b0;
ecfg_tx_config_reg[10:0] <= 11'b0;
else if (ecfg_tx_config_write)
ecfg_tx_config_reg[9:0] <= mi_din[9:0];
ecfg_tx_config_reg[10:0] <= mi_din[10:0];
assign ecfg_tx_enable = ecfg_tx_config_reg[0];
assign ecfg_tx_mmu_enable = ecfg_tx_config_reg[1];
assign ecfg_tx_gpio_enable = (ecfg_tx_config_reg[3:2]==2'b01);
assign ecfg_tx_tp_enable = (ecfg_tx_config_reg[3:2]==2'b10);//test pattern
assign ecfg_tx_remap_enable = ecfg_tx_config_reg[3:2]==2'b01;
assign ecfg_tx_ctrlmode[3:0] = ecfg_tx_config_reg[7:4];
assign ecfg_tx_ctrlmode_bp = ecfg_tx_config_reg[8];
assign ecfg_tx_remap_enable = ecfg_tx_config_reg[9];
assign ecfg_tx_gpio_enable = (ecfg_tx_config_reg[10:9]==2'b01);
assign ecfg_tx_tp_enable = (ecfg_tx_config_reg[10:9]==2'b10);//test pattern
//###########################1
//# STATUS REGISTER
//###########################
@ -207,7 +206,7 @@ module ecfg_tx (/*AUTOARG*/
always @ (posedge mi_clk)
if(ecfg_read)
case(mi_addr[RFAW+1:2])
`ELTXCFG: mi_dout[31:0] <= {23'b0, ecfg_tx_config_reg[8:0]};
`ELTXCFG: mi_dout[31:0] <= {21'b0, ecfg_tx_config_reg[10:0]};
`ELTXGPIO: mi_dout[31:0] <= {23'b0, ecfg_tx_gpio_reg[8:0]};
`ELTXSTATUS: mi_dout[31:0] <= {16'b0, ecfg_tx_status_reg[15:0]};
default: mi_dout[31:0] <= 32'd0;

16
elink/hdl/elink_regmap.v
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@ -24,22 +24,20 @@
`define ELTXSTATUS 4'h1 //D0004-tx status
`define ELTXGPIO 4'h2 //D0008-direct data for tx pins
`define ELTXTEST 4'h3 //D000C-control for driving SERDES directly
`define ELTXDATA 4'h4 //D0010-static data (for testing)
`define ELTXDSTADDR 4'h5 //D0014-static addr (for testing)
`define ELTXDATA 4'h4 //D0010-static data (for testing)
`define ELTXSRCADDR 4'h6 //D0014-static source addr (for testing)
//ELINK RX registers
`define ELRXCFG 4'h0 //C0000-config
`define ELRXSTATUS 4'h1 //C0004-status register
`define ELRXDIN 4'h2 //C0008-sampled data
`define ELRXGPIO 4'h2 //C0008-sampled data
`define ELRXBASE 4'h3 //C000c-memory base for remap
`define EMAILBOXLO 4'h4 //C0010-mailbox
`define EMAILBOXHI 4'h5 //C0014-mailbox
`define EXXX0 4'h6 //C0018-reserved
`define EXXX1 4'h7 //C001c-reserved
`define EDMACFG 4'h8 //C0020-dma
`define EDMASTATUS 4'h9 //C0024-dma
`define EDMASRC 4'hA //C0028-dma
`define EDMADST 4'hB //C002c-dma
`define EDMACOUNT 4'hC //C0030-dma
`define EDMACFG 4'h6 //C0018-dma
`define EDMASTATUS 4'h7 //C001C-dma
`define EDMASRC 4'h8 //C0020-dma
`define EDMADST 4'h9 //C0024-dma
`define EDMACOUNT 4'hA //C0028-dma