FPGA/oh
1
0
Fork 0
mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00
Code Issues Projects Releases Wiki Activity
1,458 Commits 7 Branches 1 Tag
Commit Graph

1458 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
aolofsson
b997ddd691 Adding readback indicator for AXI slave mux 2014-11-06 12:14:49 -05:00
aolofsson
26c5da0cbb Create combined reset (hw+sw) 
Added data select output for axi_slave mux
Signal cleanup (gpio_data)
 2014-11-06 11:52:38 -05:00
aolofsson
0ba677883d Adding run.sh files for simulation 2014-11-05 20:00:57 -05:00
aolofsson
122fb564c8 Changing to 20 bit address interface 2014-11-05 19:59:15 -05:00
aolofsson
536613b230 Changed to 20 bit addressing for clarity in FPGA 2014-11-05 19:49:18 -05:00
aolofsson
2851e01228 Changed to 20 bit address width for clarity in FPGA block 2014-11-05 19:37:25 -05:00
aolofsson
5abdec0b18 Run script for embox 2014-11-05 19:36:58 -05:00
aolofsson
4ab49e07c2 Reorganizing structure to be IP centric 
-Each directory contains one sub block
-Each directory contains a dv/docs/hdl directory, self contained.
-May need to add constraints directory as well at some point.
-This is the right thing to do, make each block modular and self contained.
 2014-11-05 14:31:05 -05:00