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9 Commits

Author SHA1 Message Date
Andreas Olofsson
c8b931efb0 Improving the elink_axi environment
- Turns out there was a bug hidden in the emaxi that can only be found by properly driving a master device with reads. This could not happen in the old environment.
- Note that due to limitations in the esaxi, I had to add the etx_fifo block as an interface (simplest).
- The ESAXI is very limited in that it MUST interface to a fifo with spare entries. (so prog_full). This should be FIXED!
- Minimal test passes, now to try to reproduce the DMA bug..
2015-11-18 23:26:59 -05:00
Andreas Olofsson
4637f90546 Fixing wait circuit in dut (randome wait gen was removed from top) 2015-11-13 16:27:06 -05:00
Andreas Olofsson
8820c8500a Adding wait circuit for axi/elink 2015-11-12 10:47:52 -05:00
Andreas Olofsson
a9e034bef9 Bringing access low during wait 2015-11-12 00:58:06 -05:00
Andreas Olofsson
04cd179f5a Lint fixes for icarus/verilator 2015-11-09 21:57:25 -05:00
Andreas Olofsson
63bf5d25a4 Moving to active low reset
- Because this is the right thing to do for chips
- Not going to tell you why...
2015-11-06 16:51:57 -05:00
Andreas Olofsson
3969e6d19e Moving to MIT license 2015-11-06 11:25:05 -05:00
Andreas Olofsson
f849f2410f Adding infrastructure for axi_elink
- Need to clean up some of these files later
2015-11-03 19:52:08 -05:00
Andreas Olofsson
34d379ecb9 Adding new "simpler" test infrastruture
- build elink with one command
- place all tests in tests/ directory
- new stimulus format followed
- dut_elink.v created
2015-11-02 16:04:46 -05:00