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1,567 Commits 7 Branches 1 Tag
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35 Commits

Author SHA1 Message Date
aolofsson
289024fd89 Flattening directory tree (again) 
- Creating an arbitrary 'src' directory really doesn't help much...
- Goal is to make each folder self contained
- Make meta repos and individual repos have the same directory structure
 2022-06-21 14:48:48 -04:00
aolofsson
e89f815b38 Going back to placing all folders in src 
- Only way to scale, final decision!!
 2022-05-29 08:45:00 -04:00
Andreas.Olofsson
d6f5de24d7 Changing hierarchy to promote blocks 2020-01-28 18:12:57 -05:00
Andreas Olofsson
7094173ae9 Reorg! Why? 
- The top level directory was not scaling, too imposing
- Friendlier to download a repo and see a finite number of top level dirs
- We are just getting started...
 2016-03-22 08:13:40 -04:00
Andreas Olofsson
a991a4fc06 Fixed mux bug in spi 
- copy paste error
 2016-03-21 20:49:39 -04:00
Andreas Olofsson
bc6641bcd0 Simplifying state machine on spi master 
- Divide and conquer, use the  par2ser wait signal to hold off on read
- Removed the stupid byte done state! Was too complicated.
 2016-03-21 20:48:18 -04:00
Andreas Olofsson
2a993815c3 Fixed readback bug 
- Only readback on reads
 2016-03-21 20:47:48 -04:00
Andreas Olofsson
71230c8c95 Resetting slave par2ser with ss (not nreset!) 
- Shifting out on positive edge of sclk
 2016-03-21 20:46:05 -04:00
Andreas Olofsson
7b3ca453f4 Looping back master spi access/packet to driver/stimulus 2016-03-21 20:27:10 -04:00
Andreas Olofsson
c9b2b9e0d8 Fixing basic spi test to fit new clock divider 2016-03-21 20:26:29 -04:00
Andreas Olofsson
490a3f6be1 SPI compilation cleanup 
- due to changes in par2ser and clock divider
- disadvantage of using common modules that change...
 2016-03-21 11:15:41 -04:00
Andreas Olofsson
74d1a9dc72 Fixing SPI header file inclusion issue 2016-03-11 15:08:01 -05:00
Andreas Olofsson
56ed1626b5 SPI working! 
-changed register file sampling to falling edge of sclk...ran out of edges
-fixed the register map for readback
-fixed status register
-fixed user register decode
 2016-03-10 22:04:24 -05:00
Andreas Olofsson
871da0488e Completed readback circuit on master 2016-03-10 22:03:38 -05:00
Andreas Olofsson
b34a3795e8 Completed basic SPI test 
- configure master
- write to tx fifo
- read from remote slave
- read from local master register
 2016-03-10 22:02:25 -05:00
Andreas Olofsson
a7003be8e9 Changing SPI command structure 
- Read/write commands should be at MSBs (7:6)
- Fixed fifo read race..need to look at this again
 2016-03-10 17:33:52 -05:00
Andreas Olofsson
286914e53c SPI debug cleanup 2016-03-10 17:01:29 -05:00
Andreas Olofsson
534fa69b50 Fixing SPI slave write register bug 
- Writes working
 2016-03-10 17:00:52 -05:00
Andreas Olofsson
f9414d91ee Changin SPI slave parameter 
- More natural to work with UREGS
 2016-03-10 17:00:13 -05:00
Andreas Olofsson
af96108db1 Fixing SPI bugs 
- Now working with byte addresses
- Wait should be on prog_full
 2016-03-10 16:58:18 -05:00
Andreas Olofsson
4589062821 Fixing SPI pushback contention bug (typo) 2016-03-10 16:57:37 -05:00
Andreas Olofsson
63b56d9ec9 Adding command reg to spi master 
- Makes the emode more efficient, only setup command once
 2016-03-10 14:20:25 -05:00
Andreas Olofsson
8cf7c40c44 Simplifying spi slave 
- Clock sync made easier by detecting rising edge of ss
- Piping data into slave regs
- State machine simplified
 2016-03-10 14:19:07 -05:00
Andreas Olofsson
d57306619b Adding SPI documentation 2016-03-10 14:17:50 -05:00
Andreas Olofsson
41e789b677 Refactoring to maximize code reuse 
-using common clock divider, ser2par block
-starting the readbkack circuit + auto transfer
 2016-03-10 11:07:51 -05:00
Andreas Olofsson
f60f3515e6 Making front page table links to README files 
-Every folder should be more or less self contained
-Hopefully one day this repo will look more like parallella-examples
 2016-03-10 07:38:06 -05:00
Andreas Olofsson
8c350eed91 Debugged most of SPI 
-Changed to FIFO on TX path (cleaner)
-No good solution on RX with CDC since clock can stop, so you can't use an async fifo.
-Slave needs cleanup, rethink...
-Using commong par2ser and ser2par blocks
 2016-03-09 22:46:24 -05:00
Andreas Olofsson
53671d8fc8 Cleanup old files 2016-03-09 06:57:30 -05:00
Andreas Olofsson
4c53eab4ab Adding combined master/slave spi top level 2016-03-08 21:59:08 -05:00
Andreas Olofsson
2ef626b91a Spi slave name changes 
-to be consistant with interface for emesh/core
 2016-03-08 21:22:26 -05:00
Andreas Olofsson
cb0b0e933c Adding basic tests for small modules 
(so that run.sh can runt out of top dir)
 2016-03-08 21:21:41 -05:00
Andreas Olofsson
2b62ffb1cd Adding SPI master 
-code compiles, but still needs debugging
-small parts not implemented
 2016-03-08 19:33:53 -05:00
Andreas Olofsson
8e5f209115 Implemented parametrized spi slave module 
- Compiles, but not debugged yet! (needs cleanup)
- Next up : implement master, testbench
 2016-03-07 22:47:17 -05:00
Andreas Olofsson
a5194a30a3 Reorg 
-Renaming constants files as ".vh"
-Cleanup parameters
 2016-02-26 19:08:40 -05:00
Andreas Olofsson
cbb2ba0279 Adding SPI module 
-Work in progress!
 2016-01-24 23:41:18 -05:00