Andreas Olofsson
2672519ab0
Adding memory to driver
...
-More modular, foudn myself adding memories in a lot of places
2015-12-17 12:53:20 -05:00
Andreas Olofsson
ec627556f7
Fixing basic FIFO bug
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- count was not fully reset...
- adding parameter values to memory instance
2015-12-10 19:32:15 -05:00
Andreas Olofsson
22976b781d
Adding count/almost full to fifo
2015-12-08 21:10:17 -05:00
Andreas Olofsson
dd811ab417
Fixing unconnected wire bug
2015-12-05 09:01:18 -05:00
Andreas Olofsson
2d953d5639
Fixed unconnected wires in standby circuit
2015-12-04 17:32:15 -05:00
Andreas Olofsson
f5bb42dfe3
Moving axi cells to own folder
2015-12-04 03:38:26 -05:00
Andreas Olofsson
d5edb1ca88
Fixing priority on etx_arbiter
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- don't do a combinatorial loopback on wait in a primitive cell, just bad practice...
- changed priority to give readback priority over read, safer?
2015-12-04 03:36:42 -05:00
Andreas Olofsson
eb8f6c1f51
Adding datagate power saving module
2015-12-03 18:05:08 -05:00
Andreas Olofsson
8464c3dcb0
Adding standby logic block
2015-12-03 18:04:46 -05:00
Andreas Olofsson
16b0655151
Name change for arbiter
2015-12-03 18:04:10 -05:00
Andreas Olofsson
b9107474a9
Vectorizing oh_clockgate
2015-12-03 18:03:02 -05:00
Andreas Olofsson
69d2c2c5fb
Prettyfying csa port names
2015-12-03 18:01:47 -05:00
Andreas Olofsson
3a8f81d4a3
Changing single port memory to be ASIC friendly
2015-12-03 18:01:21 -05:00
Andreas Olofsson
7b8460b145
Fixing up issues with database reorg
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- Not sure where the prog_full issue popped up from. (sign of disorganized databsae)
-
2015-11-30 15:07:28 -05:00
Andreas Olofsson
19fa611bb9
Massive reorganization to impove reuse
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- adding more chip code
- pushing memory stuff into common
- making common "oh_" naming class
-
2015-11-30 13:45:49 -05:00
Andreas Olofsson
9ddd71024d
Fixing system_bd interface for "mailbox_irq" signal
2015-11-29 12:41:53 -05:00
Andreas Olofsson
162cb022f9
Adding pushback circuit to stimulus
2015-11-24 01:04:14 -05:00
Andreas Olofsson
074186bd31
Adding new axi utility lib to sim file + README cleanup
2015-11-18 23:33:08 -05:00
Andreas Olofsson
aff0d82a30
Fixing issue with bit stream write
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- Script was exiting before bit stream was written
2015-11-17 22:13:46 -05:00
Andreas Olofsson
3102d6cd44
Adding comments
2015-11-16 09:58:47 -05:00
Andreas Olofsson
4b384be602
Fixing edge align circuit
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- duh error
- making output positive edge aligned, the negedge nastyness should be maintained within module...
2015-11-14 23:33:48 -05:00
Andreas Olofsson
e70c51670c
Adding edge align circuit
2015-11-14 22:41:19 -05:00
Andreas Olofsson
75cef84075
Timescale stuff
...
- Need to look into this again, gotchas here
-
2015-11-13 16:25:38 -05:00
Andreas Olofsson
3f1296b099
Cleanup
2015-11-12 10:50:05 -05:00
Andreas Olofsson
a9e034bef9
Bringing access low during wait
2015-11-12 00:58:06 -05:00
Andreas Olofsson
04cd179f5a
Lint fixes for icarus/verilator
2015-11-09 21:57:25 -05:00
Andreas Olofsson
55ba8ff635
Cleaning up warnings from FGPA tools
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- removing unconnected ports
- only one rst input for async_fifo
- synchronizing the reset input toe emaxi fifo
2015-11-09 13:23:40 -05:00
Andreas Olofsson
cf2123ce88
Don't generate fifo during packaging
2015-11-09 13:22:27 -05:00
Andreas Olofsson
64f55eb792
Fix 0 day bug...
...
- this shows why it's so important to read the warnings. (circuit was broken!)
2015-11-09 13:21:26 -05:00
Andreas Olofsson
01fd24e069
Fixing synchronization reset speed path
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- This seems silly, why even have a syncrhonizer
- Safe to set speed path?
2015-11-09 00:16:35 -05:00
Andreas Olofsson
875e4213a5
Adding attributes to sync logic
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- Otherwise tool was throwing away logic and timing incorretly.
- This is why you HAVE to isolate this logic! Solve the problem once for all logic and for everyone.
2015-11-08 23:30:47 -05:00
Andreas Olofsson
b6c95e5b94
Cleanup
2015-11-06 22:34:08 -05:00
Andreas Olofsson
979b20a451
Fixing name on fileset for constraints
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- Apparantly has to be fixed to constr&^(I&W)%
2015-11-06 22:32:46 -05:00
Andreas Olofsson
ebf2e861de
Need to validate design before writing tcl
2015-11-06 20:47:35 -05:00
Andreas Olofsson
a683e58597
Associating clock with bus interface
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- This should be moved to the block , block specific...
2015-11-06 20:45:38 -05:00
Andreas Olofsson
63bf5d25a4
Moving to active low reset
...
- Because this is the right thing to do for chips
- Not going to tell you why...
2015-11-06 16:51:57 -05:00
Andreas Olofsson
322dc1119c
Adding standard modules for reset and data sync
2015-11-06 16:51:35 -05:00
Andreas Olofsson
8a89b7e185
Adding more structured vivado build files
2015-11-06 14:11:46 -05:00
Andreas Olofsson
3969e6d19e
Moving to MIT license
2015-11-06 11:25:05 -05:00
Andreas Olofsson
751ad95a16
Adding parallella dir
2015-11-06 07:02:04 -05:00
Andreas Olofsson
92272e211d
Adding missind dirs in comamnd file
2015-11-04 20:04:44 -05:00
Andreas Olofsson
63e0017275
Stimulus end of test issue
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- Still not 100% on this...but test passes
- Teset was hanging even though stim_done went high. Ticks not advancing, pointing towards comb loop, but what is different at end of test?
- Now to test read/writes of registers from axi and set the idelay registers
2015-11-03 19:56:27 -05:00
Andreas Olofsson
3f9ac4d745
Adding missing files
2015-11-03 14:16:50 -05:00
Andreas Olofsson
85cc46567a
Removing reset
2015-10-08 10:45:27 -04:00
Andreas Olofsson
2e9744cd44
Changing default to simplify instantiation
2015-05-14 22:46:23 -04:00
Andreas Olofsson
35d86bcdc3
Adding pulse_stretcher circuit
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-simple but powerful for syncing from fast to slow clock domains
2015-05-14 22:45:32 -04:00
Andreas Olofsson
61de7c366a
Cleaning up clock divider
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-moving 90 degree phase shift to PLL
2015-05-06 12:26:07 -04:00
Andreas Olofsson
b05f236d13
Clocks on during reset
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-Otherwise we can't do sync reset anywhere
-glitch on exit from reset? Do we care? Everything is static
-Need to check this again!
2015-05-03 23:21:10 -04:00
Andreas Olofsson
21dcedbda2
Adding simple priority arbiter
...
Yes it's simple, but youl should never have to rewrite this code
For larger arbiters, too much risk of making a mistake...
Arbitration mistakes aver nasty to find and nasty to debug!
2015-05-03 23:19:40 -04:00
Andreas Olofsson
754aae749f
Adding various helper modules
2015-05-01 17:13:21 -04:00
