6 Commits

Author	SHA1	Message	Date
Andreas Olofsson	c1beed9a13	Two more wait bugs for burst ... - The burst signal needs to be pipelined like everything else (0th order..) - Don't look at write signal when pushing back wait...WILL GO BACK AND REVISIT THIS ONE LATER. - Yeah, burst write test now passes!!!!	2015-11-13 17:26:05 -05:00
Andreas Olofsson	78a72aa428	fixing packet format for remap block	2015-11-13 16:31:29 -05:00
Andreas Olofsson	63bf5d25a4	Moving to active low reset ... - Because this is the right thing to do for chips - Not going to tell you why...	2015-11-06 16:51:57 -05:00
Andreas Olofsson	dcf72537e4	Separate rd/wr stalls	2015-05-04 17:09:50 -04:00
Andreas Olofsson	a6ac9b4666	Added bit to etx_remap ... -To enable writing to ERX, we need to include the group number -support groups F,E,D,C (bits [19:18])	2015-04-28 16:56:31 -04:00
Andreas Olofsson	ea7683693c	Adding RX/TX address remapping ... The MMU is a monster and may be too much Adding simple remapping modules Covers todays feature and then some 1.) Static remapping 2.) Addresss compression	2015-04-24 17:29:05 -04:00