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6 Commits

Author SHA1 Message Date
Andreas Olofsson
3969e6d19e Moving to MIT license 2015-11-06 11:25:05 -05:00
Andreas Olofsson
8b2974feae Massive reorg!
- flattening hierarchy
- removing junk
2015-11-06 10:59:22 -05:00
Andreas Olofsson
0fcea92b0d Scripts per "project" 2015-11-06 06:58:47 -05:00
Andreas Olofsson
90998b8ad0 Adding parallella synthesis scripts 2015-11-06 06:58:14 -05:00
Andreas Olofsson
6cb5f88073 Moving block deisgns into a single Parallella module
- Easier to maintain
- Better sandbox
2015-11-06 06:56:56 -05:00
Andreas Olofsson
bc53400888 Adding parallella block design
-Start with gui
-Generate block design
-Edit text, this is f'ing crazy!
-If this is the only way to use the vivado IP not sure I want it
-Strive towards doing everything in verilog
-Split into:
1.) Verilog block (no IP!)
2.) One top level to instantiate IP + clean verilog block
-Never fight the tools..
2015-05-22 21:38:39 -04:00