- The top level directory was not scaling, too imposing
- Friendlier to download a repo and see a finite number of top level dirs
- We are just getting started...
-adding target parameter to fifo
-fixing rx protocol bugs
-adding defaults to register file, usually these should be set to zero and
-don't clock gate the DDR TX, just causes output to toggle like clock, BAD!
-fixed status register sticky bug
-adding autoincrement feature in amode
-fixing dut file for new "mio" subsystem
-**emesh packet now goes through in loopback!!!**
- now includes mio regs as well
- next: create a complete block, ie dog fooding to include the mio_regs an axi interface, and a decoder interface to make it look like a subsystem (like the elink)
