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413 Commits 7 Branches 1 Tag
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5 Commits

Author SHA1 Message Date
Andreas Olofsson
c627827a6b Fifo cleanup 
-Adding model (one source..)
-generate for 104x32 for xilinx
-making prog_full the default full indicator
-bringing out almost_full for future use
-fixing interface change in all modules
 2015-07-02 16:59:38 -04:00
Andreas Olofsson
0c66100d6d Adding half full signal to fifo 2015-07-02 15:00:18 -04:00
Andreas Olofsson
51a642a7b7 Adding 32 deep interface fifo for AXI 
-needed to support burst properly
 2015-07-02 14:59:57 -04:00
Patrik Lindström
4a749bf2d8 timing fixes 2015-07-01 00:14:46 +02:00
Andreas Olofsson
7b8a9cf474 Adding IP file for async fifo 
-This is the place for all generic IP blocks
 2015-05-23 22:24:44 -04:00