3 Commits

Author	SHA1	Message	Date
Andreas Olofsson	7df92eb1f0	Removing DMA from transmit ... * Seems like a useless feature. Why autogenerate the transactions at the transmit side. This should always be done at the receive side to minimize bits moving across the link. Can't really see a use for it anymore so I am removing it. * If you want to hack the design to reduce latency, you can always grab the raw etx_core and drive signals directly through write port. * May consider adding a fourth port to etx to allow bypassing the link interfac? * Add an ifdef to bypass the fifos?	2015-08-07 09:05:11 -04:00
Andreas Olofsson	6ba45155fd	Integrating clock approach change ... -clocks moved outside elink -new packet interface format between protocol and io block	2015-05-13 23:29:18 -04:00
Andreas Olofsson	eaadfc6465	Adding etx/erx core modules ... -Single clock domain -Super-light... -Need to be able to remove internal feature as well -(MMU/DMA should be optional but on by default..)	2015-05-10 23:06:52 -04:00