Andreas.Olofsson
65aa1b061c
Rewritten trace script for spike
...
-ovpsim is a dead end, good bye
2020-03-28 15:37:10 -04:00
Andreas.Olofsson
cbb8f79fd2
Inverting polarity for compiler
2020-03-26 12:20:00 -04:00
Andreas.Olofsson
bf277f3d2f
Adding offset removal to script
...
-Allows us to remove the pesky 0x80000000 from the RV infrastucture
-They refuse to fix the boot sequence in spike for bare metal
-This is the workaround
2020-03-26 12:18:59 -04:00
Andreas.Olofsson
3c8da0f727
One line compile script
2020-03-05 09:02:00 -05:00
Andreas.Olofsson
419d9a67ad
Adding simple profile script for spike
...
-meant to be used with excel
2020-03-05 09:01:19 -05:00
Andreas.Olofsson
a09374d74b
Adding FAIL timeout condition in test
2020-02-15 21:58:17 -05:00
Andreas.Olofsson
82f160561e
Only write result for r0-31
...
-Add spcial csrs later
2020-02-15 21:57:11 -05:00
Andreas.Olofsson
0086fa1012
Adding register look up table
...
-simulator trace uses abi names, hardware uses raw registers
2020-02-14 23:28:32 -05:00
Andreas.Olofsson
3fba513a29
Adding script for converting difference trace formats to epiphany
...
Speeds up debugging immensly
Goal is to mmake it so that files can be tkdiffed and readable without any extra python scripts to post process
2020-02-14 21:24:06 -05:00
Andreas.Olofsson
2f2ea2ad93
Fixing bug in address mapping
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-NEeded to divide by width/8
2020-02-14 21:23:26 -05:00
Andreas.Olofsson
099b9527e3
Customizing linker file per architecture
2020-02-14 21:22:18 -05:00
Andreas.Olofsson
6b01f16935
Addubg asm2elf and elf2hex scripts
2020-02-06 22:11:00 -05:00
Andreas.Olofsson
927b31a811
Improving script comments
2020-02-06 10:05:55 -05:00
Andreas.Olofsson
e04d6a0615
Adding print to file fuctionality
2020-02-04 20:36:00 -05:00
Andreas.Olofsson
9bb84ebe20
Adding hex2hex file in python
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-Script working!
-Still need to finish the emf format
-Still need to finish proper script commands
2020-02-04 20:10:09 -05:00
Andreas Olofsson
998f3021cc
Fixed elink platform compile errors
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-Ultrascale changes broke the zynq design
-Adding CFG_PLATFORM variable to control compilation target
2017-11-22 11:32:20 -05:00
Andreas Olofsson
b9a9853753
Linking test file, copying around sources is really bad...
2016-08-24 00:18:25 -04:00
Andreas Olofsson
381ba09617
Making CFG_ASIC a primary variable
...
-Need to separate between open FPGA design and closed ASIC design.
-NDAs means it's imposssible for us to disclose even the interfaces of the cells inside without taking the risk of violating the terms of the NDA.
-For this reason, we come up with generic and clean asic library interfaces that need to be implemented in each library/technology
2016-06-19 17:05:50 -04:00
Andreas Olofsson
4b87fdae34
Adding missing parameters statements in mio_if
2016-03-23 20:45:15 -04:00
Andreas Olofsson
c3b83621e0
Reorg cleanup
2016-03-22 08:27:59 -04:00
Andreas Olofsson
7094173ae9
Reorg! Why?
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- The top level directory was not scaling, too imposing
- Friendlier to download a repo and see a finite number of top level dirs
- We are just getting started...
2016-03-22 08:13:40 -04:00
Andreas Olofsson
8b2974feae
Massive reorg!
...
- flattening hierarchy
- removing junk
2015-11-06 10:59:22 -05:00
Andreas Olofsson
e47fd56a21
Bulk edits (clean up later)
2015-11-06 07:03:28 -05:00
Andreas Olofsson
81b71df54e
Reorg
2015-11-04 19:15:05 -05:00
Andreas Olofsson
8a8255ddfd
Adding common scripts directory
2015-11-04 14:15:49 -05:00
