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3 Commits

Author SHA1 Message Date
Andreas Olofsson
3ce9b41726 Working mailbox!
- Gating mailbox_not empty with irq_en. bit [28] of RXCFG
- Changing elink output interrupt to "or" of not_empty and full
- Adding mailbox status register (mostly for debug)
- Moving register addresses to make space for mailbox status register
- Fixing wrappers for DV
- Updating README docs with new register map
- Removing mailbox from RX status reg. Doesn't belong there, should be coupled with mailbox for modularity.
2015-11-29 12:20:17 -05:00
Andreas Olofsson
8856f7c763 DV cleanup 2015-11-25 22:00:07 -05:00
Andreas Olofsson
8915fd6dfd Adding environment for chip reference model
- Turns out I had a nasty bug that was masked by using my own RX to loopback the TX. Since the new RX is very benign with a  programmable fifo full flag the timing is quite relaxed.
- The legacy elink for e16 has a strict wait policy. When wait is raised high, you must stop pretty much immediately.
- I struggled with testing this bug on the parallella for 2 days.
- Putting together the test environment uncovered the bug in a couple of hours. F**K, I should know better!!
2015-11-24 01:07:49 -05:00