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6 Commits

Author SHA1 Message Date
Andreas Olofsson
75cef84075 Timescale stuff
- Need to look into this again, gotchas here
-
2015-11-13 16:25:38 -05:00
Andreas Olofsson
04cd179f5a Lint fixes for icarus/verilator 2015-11-09 21:57:25 -05:00
Andreas Olofsson
75c9c9deb5 Implemented model for IDELAY 2015-11-03 10:32:56 -05:00
Andreas Olofsson
0a73ff3fc5 Adding dynamic tap value behavior 2015-10-07 19:18:27 -04:00
Andreas Olofsson
394920a1e7 Addding phase delay tracking
- As a dirty a model hack as they come, using positive and negative edge of CLKIN to sample the signal and phase align the clock output.
- Will only work with div 2/4/8 etc
- There may be other issues, have to think about it...
- But the test now passes cleanly and the clocks look good.
2015-09-30 13:40:11 -04:00
Andreas Olofsson
1ec8991e2a Adding IDELAY elements to xilibs 2015-05-16 22:07:17 -04:00