Andreas Olofsson
56ed1626b5
SPI working!
...
-changed register file sampling to falling edge of sclk...ran out of edges
-fixed the register map for readback
-fixed status register
-fixed user register decode
2016-03-10 22:04:24 -05:00
Andreas Olofsson
871da0488e
Completed readback circuit on master
2016-03-10 22:03:38 -05:00
Andreas Olofsson
b34a3795e8
Completed basic SPI test
...
- configure master
- write to tx fifo
- read from remote slave
- read from local master register
2016-03-10 22:02:25 -05:00
Andreas Olofsson
a7003be8e9
Changing SPI command structure
...
- Read/write commands should be at MSBs (7:6)
- Fixed fifo read race..need to look at this again
2016-03-10 17:33:52 -05:00
Andreas Olofsson
3ca89dca2b
Fixed serializer bug
...
- ..hopefully last one
- incorrect stall signal made transactions get lost
2016-03-10 17:33:02 -05:00
Andreas Olofsson
ed8d29ee2c
Fixing serializer bug
...
- SPI now working...
2016-03-10 17:03:38 -05:00
Andreas Olofsson
da6856befa
Adding reset signal to pulse interfaces
...
- Needed for some logic with feedback, otherwise you get "x" loop
- Those who don't need it should be able to connect nrest to 1'b1
2016-03-10 17:02:03 -05:00
Andreas Olofsson
286914e53c
SPI debug cleanup
2016-03-10 17:01:29 -05:00
Andreas Olofsson
534fa69b50
Fixing SPI slave write register bug
...
- Writes working
2016-03-10 17:00:52 -05:00
Andreas Olofsson
f9414d91ee
Changin SPI slave parameter
...
- More natural to work with UREGS
2016-03-10 17:00:13 -05:00
Andreas Olofsson
af96108db1
Fixing SPI bugs
...
- Now working with byte addresses
- Wait should be on prog_full
2016-03-10 16:58:18 -05:00
Andreas Olofsson
4589062821
Fixing SPI pushback contention bug (typo)
2016-03-10 16:57:37 -05:00
Andreas Olofsson
383dd50b99
Fixed lethal off by one fifo full bug!
2016-03-10 14:58:29 -05:00
Andreas Olofsson
63b56d9ec9
Adding command reg to spi master
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- Makes the emode more efficient, only setup command once
2016-03-10 14:20:25 -05:00
Andreas Olofsson
8cf7c40c44
Simplifying spi slave
...
- Clock sync made easier by detecting rising edge of ss
- Piping data into slave regs
- State machine simplified
2016-03-10 14:19:07 -05:00
Andreas Olofsson
d57306619b
Adding SPI documentation
2016-03-10 14:17:50 -05:00
Andreas Olofsson
6ad31e5c20
Cleanup GPIO docs table
2016-03-10 14:17:33 -05:00
Andreas Olofsson
e08f5a8fc7
Adding address table to GPIO
2016-03-10 11:13:24 -05:00
Andreas Olofsson
41e789b677
Refactoring to maximize code reuse
...
-using common clock divider, ser2par block
-starting the readbkack circuit + auto transfer
2016-03-10 11:07:51 -05:00
Andreas Olofsson
a5b4768b3b
Vectorizing edge2pulse module
2016-03-10 11:07:14 -05:00
Andreas Olofsson
e900ecca2a
Simplifying clockdiv
...
-tested in spi block
-more generic, simpler
2016-03-10 11:06:28 -05:00
Andreas Olofsson
d129b93040
Adding edge specific pulse generators
2016-03-10 11:05:36 -05:00
Andreas Olofsson
f60f3515e6
Making front page table links to README files
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-Every folder should be more or less self contained
-Hopefully one day this repo will look more like parallella-examples
2016-03-10 07:38:06 -05:00
Andreas Olofsson
8c350eed91
Debugged most of SPI
...
-Changed to FIFO on TX path (cleaner)
-No good solution on RX with CDC since clock can stop, so you can't use an async fifo.
-Slave needs cleanup, rethink...
-Using commong par2ser and ser2par blocks
2016-03-09 22:46:24 -05:00
Andreas Olofsson
ef790c1a59
Expanding par2ser functionality
...
-module now works for multi bit shifts
-has been used in spi master module
-versatile load and shift bits
2016-03-09 21:11:17 -05:00
Andreas Olofsson
e619bf9ef1
Making fifo safer
...
-Blocking reads when fifo is empty
-Blocking writes when fifo is full
2016-03-09 21:10:11 -05:00
Andreas Olofsson
e471850bd7
Adding table of content to README
2016-03-09 14:40:36 -05:00
Andreas Olofsson
53671d8fc8
Cleanup old files
2016-03-09 06:57:30 -05:00
Andreas Olofsson
4c53eab4ab
Adding combined master/slave spi top level
2016-03-08 21:59:08 -05:00
Andreas Olofsson
d9f18e7b58
DV cleanup
...
-removing all redundant build files, there must be only one...
2016-03-08 21:23:02 -05:00
Andreas Olofsson
2ef626b91a
Spi slave name changes
...
-to be consistant with interface for emesh/core
2016-03-08 21:22:26 -05:00
Andreas Olofsson
cb0b0e933c
Adding basic tests for small modules
...
(so that run.sh can runt out of top dir)
2016-03-08 21:21:41 -05:00
Andreas Olofsson
9ce82bd3c8
Adding testbench for pic
2016-03-08 21:21:06 -05:00
Andreas Olofsson
02601cfc1d
Adding dut for emmu
2016-03-08 21:20:48 -05:00
Andreas Olofsson
af55033d05
Adding dut for emailbox
2016-03-08 21:20:34 -05:00
Andreas Olofsson
e549a63a04
Reorg/cleanup
2016-03-08 19:37:42 -05:00
Andreas Olofsson
e2090b4071
Cleaning up script outputs
2016-03-08 19:37:19 -05:00
Andreas Olofsson
6e22772420
Removed autoinst for dut.v
...
-Had to remove the dummy dut.v to make scripts and links cleaner
2016-03-08 19:36:44 -05:00
Andreas Olofsson
450f398065
Making xilinx default target for now
...
-Need a cleaner way of dealing with define constants
2016-03-08 19:35:44 -05:00
Andreas Olofsson
14614bcfa5
Adding new clock signals to axi testbench
2016-03-08 19:35:25 -05:00
Andreas Olofsson
acce93fa0f
Trying a better contention error message
...
- Addding delayed sampling before displaying error
- Attempt to remove glitches
2016-03-08 19:34:37 -05:00
Andreas Olofsson
2b62ffb1cd
Adding SPI master
...
-code compiles, but still needs debugging
-small parts not implemented
2016-03-08 19:33:53 -05:00
Andreas Olofsson
e622aa1b33
Reorg
2016-03-08 15:49:54 -05:00
Andreas Olofsson
197e2a38bc
Putting simplified scripts in $OH_HOME
2016-03-08 15:49:15 -05:00
Andreas Olofsson
789aa888a5
Filtering out
2016-03-08 14:58:21 -05:00
Andreas Olofsson
8e5f209115
Implemented parametrized spi slave module
...
- Compiles, but not debugged yet! (needs cleanup)
- Next up : implement master, testbench
2016-03-07 22:47:17 -05:00
Andreas Olofsson
983caa7138
Adding code pointers to readme
2016-03-05 16:42:41 -05:00
Andreas Olofsson
232d004ee2
Adding README for gpio
2016-03-05 16:36:58 -05:00
Andreas Olofsson
1ebe74d285
Cleanup GPIO logic
...
-various bringup bug fixes
-name simplication
-now works in simulation
2016-03-05 16:16:22 -05:00
Andreas Olofsson
53838f35ea
Added test/dv for gpio block
...
-note: with the number of blocks growing, there really needs to be more common iinfrastructure around the builds
-every block should be independent, yet you don't want to repeat the scripts
2016-03-05 16:10:06 -05:00
