-Need to separate between open FPGA design and closed ASIC design.
-NDAs means it's imposssible for us to disclose even the interfaces of the cells inside without taking the risk of violating the terms of the NDA.
-For this reason, we come up with generic and clean asic library interfaces that need to be implemented in each library/technology
- The top level directory was not scaling, too imposing
- Friendlier to download a repo and see a finite number of top level dirs
- We are just getting started...
