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16 Commits

Author SHA1 Message Date
Andreas Olofsson
ce7c89ce1e Fixing read response logic
- Should only pass back read response EGROUP_RR
- Otherwise there would be a match on writing to MAILBOX
2016-01-19 13:27:22 -05:00
Andreas Olofsson
a68bba1572 Cleaning up register interface
- Removed the cfgif block, too confusing. There is a good lesson here. Probably the n'th time I that I have been overzealous about reuse. When you end up adding a parameter to a block that duplicates the logic 2X it's always better to create two separate blocks...
- Changed the register access interface to packet format
- Change the priority on the etx_arbiter to pick read responses first
- Removed redundant signals
- Took away the read resonse bypass on remap in tx for now..
- Removed defparams (convention)
- Unified wait signal on tx
- Fixed cfg wait
-
2016-01-11 17:35:53 -05:00
Andreas Olofsson
b130ac8fea Making AW in emesh2packet / packet2emesh explicit parameter 2016-01-10 11:51:49 -05:00
Andreas Olofsson
d558bd5f99 Packet converter interface changes
-packet2emesh and emesh2packet had interface name changes
2015-12-17 12:51:22 -05:00
Andreas Olofsson
ddfeebd33f Cleaning up read response logic
- Bypass path was ugly! Always try to go through the same logic path as much as possible.
- Note: when MMU is enabled, you need to put in entry for read return (ie 810)
2015-11-29 19:07:28 -05:00
Andreas Olofsson
df0deabd0f Re-re-fixing the wait on RX
- (fixing a temporary bad commit)
2015-11-15 01:34:20 -05:00
Andreas Olofsson
f7806821c7 Various wait cleanups in RX
- using rx reset, safer as this stays in reset longer, until the clock has hade time to clean up the rest
2015-11-13 16:28:40 -05:00
Andreas Olofsson
efef6448c2 Fixing wait bug on config write (2 bugs)
- missing reset on wait signal
- missing wait on cfg
2015-11-09 21:55:46 -05:00
Andreas Olofsson
e2c917b6f9 Fixed packet reformatting bug 2015-11-09 20:38:55 -05:00
Andreas Olofsson
3969e6d19e Moving to MIT license 2015-11-06 11:25:05 -05:00
Andreas Olofsson
971b591454 Shifting first byte of packet down by one bit to accomodate new format
- this of for future proofing
2015-11-02 20:51:35 -05:00
Andreas Olofsson
86e8579e48 Adding testmode for RX 2015-10-07 21:58:50 -04:00
Andreas Olofsson
ede8656081 Fixing mutual exclusive bug on receiver
-When a read response is detected, there should be no spurious transactions to the RD/WR request fifos.
-Move the "filter" backt to the erx_protocol block
-Removed the remap bypass signal (was hacky)
-Passes simulations again..
2015-08-14 15:37:37 -04:00
Patrik Lindström
634ff371ac Bug fixes 2015-06-30 13:32:05 +02:00
Andreas Olofsson
005c9872dd Removing timeout from logic
-Should be direct interface to esaxi
2015-05-19 23:51:17 -04:00
Andreas Olofsson
624d0e6134 Reorg cleanup
-renamed disty for consistency (there is an arbiter there now)
-adding missing ID to etx/erx
-New org working!
2015-05-12 07:41:48 -04:00