Chip Design Glossary
===============================

## Chip Architecture

* [ADC](https://en.wikipedia.org/wiki/Analog-to-digital_converter): Analog to Digital Converter
* [AES](https://en.wikipedia.org/wiki/Advanced_Encryption_Standard): Advanced encryption standard
* [Adder](https://en.wikipedia.org/wiki/Adder_%28electronics%29): Circuit to add two numbers
* [ALU](https://en.wikipedia.org/wiki/Arithmetic_logic_unit): Arithmetic logic unit
* [Amdahl's Law](https://en.wikipedia.org/wiki/Amdahl%27s_law): Amdahl's law of diminishing returns for speeding up fixed workloads
* [Arbiter](https://en.wikipedia.org/wiki/Arbiter_%28electronics%29): Arbitrates between competing requesters
* [ASIC](https://en.wikipedia.org/wiki/Application-specific_integrated_circuit): Application specific integrated circuit.
* [Audio codec](https://en.wikipedia.org/wiki/Audio_codec): Device/program that compresses/decompresses digital audio
* [Boolean algebra](https://en.wikipedia.org/wiki/Boolean_algebra): Algebra in which variables are either true or false
* [BTB](https://en.wikipedia.org/wiki/Branch_target_predictor): Branch target buffer
* [Cache](https://en.wikipedia.org/wiki/Cache_%28computing%29): Local storage of program and/or data for future use.
* [Cache coherence](https://en.wikipedia.org/wiki/Cache_coherence): Consistency of shared data that is stored in multiple local caches. 
* [CAM](https://en.wikipedia.org/wiki/Content-addressable_memory): Content addressable memory
* [CISC](https://en.wikipedia.org/wiki/Complex_instruction_set_computing): Complex instruction set computing
* [Coprocessor](https://en.wikipedia.org/wiki/Coprocessor): A processor used to supplement operations of a primary (host) processor.
* [CPI](https://en.wikipedia.org/wiki/Cycles_per_instruction): Cycles per instruction
* [CPU](https://en.wikipedia.org/wiki/Central_processing_unit): Central processing unit
* [CRC](https://en.wikipedia.org/wiki/Cyclic_redundancy_check): Cyclic redundancy check
* [CSA](https://en.wikipedia.org/wiki/Carry-save_adder): Carry save adder 
* [DAC](https://en.wikipedia.org/wiki/Digital-to-analog_converter): Digital to Analog Converter
* [Distributed Computing](https://en.wikipedia.org/wiki/Distributed_computing): Computer with components working towards common goal with without strict coupling.
* [DLL](https://en.wikipedia.org/wiki/Delay-locked_loop): Delay locked loop
* [DMA](https://en.wikipedia.org/wiki/Direct_memory_access): Direct memory access
* [DDR](https://en.wikipedia.org/wiki/Double_data_rate) Double data rate
* [DDS](https://en.wikipedia.org/wiki/Direct_digital_synthesizer): Direct digital synthesis
* [DSM](https://en.wikipedia.org/wiki/Distributed_shared_memory): Distributed shared memory
* [DSP](https://en.wikipedia.org/wiki/Digital_signal_processor): Digital signal processor
* [ECC](https://en.wikipedia.org/wiki/ECC_memory): Error correcting code
* [Ethernet](https://en.wikipedia.org/wiki/Ethernet): Family of standard network technologies
* [Fault Tolerance](https://en.wikipedia.org/wiki/Fault_tolerance): The ability of a system to keep operating in the event of failure of one of its components. 
* [FRAM](https://en.wikipedia.org/wiki/Ferroelectric_RAM): Non-volatile RAM based on ferroelectric layer.
* [FPGA](https://en.wikipedia.org/wiki/Field-programmable_gate_array): Field-programmable gate array is a chip that can be reprogrammed "in the field".
* [FIFO](https://en.wikipedia.org/wiki/FIFO_%28computing_and_electronics%29): First in first out buffer
* [GPU](https://en.wikipedia.org/wiki/Graphics_processing_unit): Integrated circuit for accelerating the creation of graphics on a display.
* [DRAM](https://en.wikipedia.org/wiki/Dynamic_random-access_memory): Dynamic random-access semiconductor memory
* [Flash](https://en.wikipedia.org/wiki/Flash_memory): Non-volatile semiconductor memory
* [FFT](https://en.wikipedia.org/wiki/Fast_Fourier_transform): Fast Fourier transform
* [FPU](https://en.wikipedia.org/wiki/Floating_point): Floating point unit
* [GPIO](https://en.wikipedia.org/wiki/General-purpose_input/output): General purpose input output, controllable at run time
* [Gray code](https://en.wikipedia.org/wiki/Gray_code): Binary system where successive values differ by one bit
* [HBM](https://en.wikipedia.org/wiki/High_Bandwidth_Memory): High bandwidth memory
* [I2C](https://en.wikipedia.org/wiki/I%C2%B2C): Multi-master 2 wire bus
* [LAN](https://en.wikipedia.org/wiki/Local_area_network): Local area network
* [LFSR](https://en.wikipedia.org/wiki/Linear_feedback_shift_register): Linear feedback shift register
* [LSB](https://en.wikipedia.org/wiki/Least_significant_bit): Least significant bit
* [LUT] (https://en.wikipedia.org/wiki/Lookup_table): An array that replaces runtime computation with a simpler array indexing operation 
* [LVDS](https://en.wikipedia.org/wiki/Low-voltage_differential_signaling): Low-voltage differential signaling (also TIA/EIA-644)
* [MII](https://en.wikipedia.org/wiki/Media-independent_interface): Media independent interface for PHY chips
* [MIMD](https://en.wikipedia.org/wiki/MIMD): Multiple instructions multiple data architecture
* [MMU](https://en.wikipedia.org/wiki/Memory_management_unit): Memory management unit
* [MSB](https://en.wikipedia.org/wiki/Most_significant_bit): Most significant bit
* [MUX](https://en.wikipedia.org/wiki/Multiplexer): Multiplexer
* [Multiplier](https://en.wikipedia.org/wiki/Binary_multiplier): Binary multiplier
* [NCO](https://en.wikipedia.org/wiki/Numerically_controlled_oscillator): Numerically controlled oscillator
* [NOC](https://en.wikipedia.org/wiki/Network_on_a_chip): Network on a chip
* [Parallel Computing](https://en.wikipedia.org/wiki/Parallel_computing): A type of computation where many operations are carried out simultaneously. 
* [PCM](https://en.wikipedia.org/wiki/Phase-change_memory): Phase change memory
* [PCIe](https://en.wikipedia.org/wiki/PCI_Express): High Speed serial computer expansion bus
* [PIC](https://en.wikipedia.org/wiki/Programmable_Interrupt_Controller): Programmable interrupt controller
* [Priority Encoder](https://en.wikipedia.org/wiki/Priority_encoder): A circuit or algorithm that compresses multiple binary inputs into a smaller number of outputs
* [PLL](https://en.wikipedia.org/wiki/Phase-locked_loop): Phase locked loop
* [PWM](https://en.wikipedia.org/wiki/Pulse-width_modulation): Pulse width modulation
* [Q](https://en.wikipedia.org/wiki/Q_%28number_format%29): Q fixed point number format
* [RAID](https://en.wikipedia.org/wiki/RAID): Redundant array of disks
* [Reconfigurable Computing](https://en.wikipedia.org/wiki/Reconfigurable_computing): Collection of customizable datapaths connected together by a fabric
* [RISC](https://en.wikipedia.org/wiki/Reduced_instruction_set_computing): Reduced instruction set computing
* [ROM](https://en.wikipedia.org/wiki/Read-only_memory): Read only memory (denser than RAM)
* [SBC](https://en.wikipedia.org/wiki/Single-board_computer): Single board computers
* [SDR](https://en.wikipedia.org/wiki/Software-defined_radio): Software defined radio
* [SERDES](https://en.wikipedia.org/wiki/SerDes): Serializer/deserializer
* [Shift Register](https://en.wikipedia.org/wiki/Shift_register): Set of registers that shifts bits one position at a time
* [SIMD](https://en.wikipedia.org/wiki/SIMD): Single instruction multiple data
* [Schmitt Trigger](https://en.wikipedia.org/wiki/Schmitt_trigger): Comparator circuit with hysteresis
* [SPI](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus): Synchronous 4 wire master/slave interface
* [SRAM](https://en.wikipedia.org/wiki/Static_random-access_memory): Static random access semiconductor memory
* [TLB](https://en.wikipedia.org/wiki/Translation_lookaside_buffer): Translation lookaside buffer
* [UART](https://en.wikipedia.org/wiki/Universal_asynchronous_receiver/transmitter): Asynchronous 2 wire point to point interface
* [USB](https://en.wikipedia.org/wiki/USB): 2 wire point to point 5 V interface
* [Video codec](https://en.wikipedia.org/wiki/Video_codec): Device/program that compresses/decompresses digital video
* [Virtual Memory](https://en.wikipedia.org/wiki/Virtual_memory): The automatic mapping of virtual program addresses to physical addresses
* [VLIW](https://en.wikipedia.org/wiki/Very_long_instruction_word): Very long instruction level parallelism
* [WAN](https://en.wikipedia.org/wiki/Wide_area_network): Wide area network
* [WIFI](https://en.wikipedia.org/wiki/Wi-Fi): Wireless local area network 
* [8b10b](https://en.wikipedia.org/wiki/8b/10b_encoding): Code that maps 8-bits to 10bit DC balanced symbols

## Chip Design

* [Antenna effect](https://en.wikipedia.org/wiki/Antenna_effect): Plasma induced gate oxide damage that can occur during semiconductor processing.
* [Asynchronous logic](https://en.wikipedia.org/wiki/Asynchronous_circuit): Logic not governed by a clock circuit or global clock.
* [ATPG](https://en.wikipedia.org/wiki/Automatic_test_pattern_generation): Automatic test pattern generation
* [BIST](https://en.wikipedia.org/wiki/Built-in_self-test): Built in Self Test
* [Chip](https://en.wikipedia.org/wiki/Integrated_circuit): A set of electronic circuits on one small plate ("chip") of semiconductor material, normally silicon.
* [Clock domain crossing](https://en.wikipedia.org/wiki/Clock_domain_crossing): Traversal of signal in synchronous digital ssytem from one clock domain to another.
* [Clock gating](https://en.wikipedia.org/wiki/Clock_gating): Technique whereby clock in synchronous logic is shut off when idle.
* [CMOS](https://en.wikipedia.org/wiki/CMOS): Complimentary metal-oxide semiconductor
* [Cross talk](https://en.wikipedia.org/wiki/Crosstalk): The coupling of nearby signals on a chip, usually through capacitive coupling.
* [CTS](https://en.wikipedia.org/wiki/Clock_signal): Clock tree synthesis
* [Domino logic](https://en.wikipedia.org/wiki/Domino_logic): Fast clocked logic with reduced capacitive load
* [DEF](https://en.wikipedia.org/wiki/Design_Exchange_Format): Design Exchange Format for layout
* [DFM](https://en.wikipedia.org/wiki/Design_for_manufacturability): Extended DRC rules specifying how to make a high yielding design. 
* [DFT](https://en.wikipedia.org/wiki/Design_for_testing): Design for test
* [Die](https://en.wikipedia.org/wiki/Die_%28integrated_circuit%29): Small block of semiconductor material that can be cut ("diced") from a silicon wafer.
* [DRC](https://en.wikipedia.org/wiki/Design_rule_checking): Design Rule Constraints specifying manufacturing constraints.
* [DV](https://en.wikipedia.org/wiki/Functional_verification): Design verification is the process of verifying that the logic design conforms to specification.
* [ECO](https://en.wikipedia.org/wiki/Engineering_change_order): Engineering change order
* [EDA](https://en.wikipedia.org/wiki/Electronic_design_automation): Electronic Design Automation tools used to enhance chip design productivity.
* [EDA companies](https://en.wikipedia.org/wiki/List_of_EDA_companies): List of EDA companies
* [Electromigration](https://en.wikipedia.org/wiki/Electromigration): Transport of material caused by the gradual movement of the ions in a conductor.
* [EMI](https://en.wikipedia.org/wiki/Electromagnetic_interference): Electromagnetic interference.
* [ESD](https://en.wikipedia.org/wiki/Electrostatic_discharge): Electrostatic discharge is the sudden flow of electricity between two electrically charged objects.
* [Fabless](https://en.wikipedia.org/wiki/Fabless_manufacturing): The design and sale of semiconductor devices while outsourcing the manufacturing to 3rd party.
* [FEOL](https://en.wikipedia.org/wiki/Front_end_of_line): Front end of line processing. Includes all chip processing up to but not including metal interconnect layers.
* [Flip-flop](https://en.wikipedia.org/wiki/Flip-flop_(electronics)): A clocked circuit that has two stable states and can be used to store state information.
* [Foundry](https://en.wikipedia.org/wiki/Semiconductor_fabrication_plant): Semiconductor company offering manufacturing services.
* [Full custom design](https://en.wikipedia.org/wiki/Full_custom): Design methodology involving layout and interconnection of individual transistors.
* [GDSII](https://en.wikipedia.org/wiki/GDSII): Binary format of design database sent to foundry.
* [HDL](https://en.wikipedia.org/wiki/Hardware_description_language): Specialized hardware description lanaguage for describing electronic circuits.
* [Hold time](https://en.wikipedia.org/wiki/Flip-flop_%28electronics%29#Setup.2C_hold.2C_recovery.2C_removal_times): Minimum time synchronous input should hold steady after clock event.
* [IP](https://en.wikipedia.org/wiki/Semiconductor_intellectual_property_core): Semiconductor reusable design blocks containing author's Intellectual Property.
* [IP Vendors](https://en.wikipedia.org/wiki/List_of_semiconductor_IP_core_vendors): List of commercial semiconductor IP vendors.
* [ISI](https://en.wikipedia.org/wiki/Intersymbol_interference): Intersymbol interference
* [Jitter](https://en.wikipedia.org/wiki/Jitter): Deviation from perfect periodicity.
* [Latchup](https://en.wikipedia.org/wiki/Latch-up): Short circuit due to creation of a low-impedance path between the power supply rails of a circuit.
* [Layout](https://en.wikipedia.org/wiki/Integrated_circuit_layout): Physical representation of an integrated circuit.
* [LEF](https://en.wikipedia.org/wiki/Library_Exchange_Format): Standard Cell Library Exchange Format layout.
* [Logical Effort](https://en.wikipedia.org/wiki/Logical_effort): Technique used to normalize (and optimize) digital circuits speed paths.
* [LVS](https://en.wikipedia.org/wiki/Layout_Versus_Schematic): Layout Versus Schematic software checks that the layout is identical to the netlist.
* [Mask Works](https://en.wikipedia.org/wiki/Integrated_circuit_layout_design_protection): Copyright law dedicated to 2D and 3D integrated circuit "layouts".
* [Mealy machine](https://en.wikipedia.org/wiki/Mealy_machine): A finite state machine whose outputs depend on current state and the current inputs.
* [Metastability](https://en.wikipedia.org/wiki/Metastability_in_electronics): Ability of a digital electronic system to persist for an unbounded time in an unstable equilibrium.
* [MLS](https://en.wikipedia.org/wiki/Moisture_sensitivity_level): Packaging and handling precautions for some semiconductors. 
* [Moore Machine](https://en.wikipedia.org/wiki/Moore_machine): Finite state machine whose outputs depend only on its current state.
* [Moore's Law](https://en.wikipedia.org/wiki/Moore%27s_law): Observation by Moore that the number of transistors in an IC doubles approximately every two years.
* [MOSFET](https://en.wikipedia.org/wiki/MOSFET): Metal oxide field effect transistor. 
* [MOSIS](https://en.wikipedia.org/wiki/MOSIS): Foundry service project offering MPWs and low volume manufacturing.
* [MPW](https://en.wikipedia.org/wiki/Multi-project_wafer_service): Multi-project wafer service that integrates multiple designs on one reticle (aka "shuttle").
* [MTBF](https://en.wikipedia.org/wiki/Mean_time_between_failures): Mean time between failures.
* [Multi-threshold CMOS](https://en.wikipedia.org/wiki/Multi-threshold_CMOS): CMOS technology with multiple transistor types with different threshold voltages.
* [Optical proximity correction](https://en.wikipedia.org/wiki/Optical_proximity_correction): Technique used to compensate for semiconductor diffraction/process effects.
* [Pass Transistor Logic](https://en.wikipedia.org/wiki/Pass_transistor_logic): Logic that connects input to non-gate terminal of mosfet transistor.
* [Physical design](https://en.wikipedia.org/wiki/Physical_design_%28electronics%29): Physical design flow ("layout").
* [PDK](https://en.wikipedia.org/wiki/Process_design_kit):  Process design kits consisting of a minimum set of files needed to design in a specific process.
* [Power gating](https://en.wikipedia.org/wiki/Power_gating): Technique used to reduce leakage/standby power by shutting of the supply to the circuit.
* [P&R](https://en.wikipedia.org/wiki/Place_and_route): Automated Place and Route of a circuit using an EDA tool.
* [PVT Corners](https://en.wikipedia.org/wiki/Process_corners): Represents the extreme process, voltage, temperature that could occur in a given semiconductor process.
* [Radiation Hardening](https://en.wikipedia.org/wiki/Radiation_hardening): Act of making devices resistant to damage caused by ionizing radiation.
* [RTL](https://en.wikipedia.org/wiki/Register-transfer_level): Design abstraction for digital circuit design.
* [Setup time](https://en.wikipedia.org/wiki/Flip-flop_%28electronics%29#Setup.2C_hold.2C_recovery.2C_removal_times): Minimum time synchronous input should be ready before clock event.
* [SEU](https://en.wikipedia.org/wiki/Single_event_upset): Change of state caused by one single ionizing particle (ions, electrons, photons...).
* [Signoff](https://en.wikipedia.org/wiki/Signoff_%28electronic_design_automation%29): The final approval that the design is ready to be sent to foundry for manufacturing.
* [SOC](https://en.wikipedia.org/wiki/System_on_a_chip): System On Chip
* [Spice](https://en.wikipedia.org/wiki/SPICE): Open source analog electronic circuit simulator.
* [STA](https://en.wikipedia.org/wiki/Static_timing_analysis): Method of computing the expected timing of a digital circuit without requiring full circuit simulation.
* [Standard Cell Design](https://en.wikipedia.org/wiki/Standard_cell): Design process relying on a fixed set of standard cells.
* [Subthreshold Leakage](https://en.wikipedia.org/wiki/Subthreshold_conduction): Current between source and drain in MOSFET when transistor is "off".
* [Synchronous logic](https://en.wikipedia.org/wiki/Synchronous_circuit): Logic whose state is controlled by a synchronous clock.
* [Synthesis](https://en.wikipedia.org/wiki/Logic_synthesis): Translation of high level design description (e.g. Verilog) to a netlist format (e.g. standard cell gate level).
* [SystemC](https://en.wikipedia.org/wiki/SystemC): Set of C++ classes and macros for simulation. Commonly used for high level modeling and testing.
* [Tape-out](https://en.wikipedia.org/wiki/Tape-out): Act of sending photomask chip database ("layout") to the manufacturer.
* [TCL](https://en.wikipedia.org/wiki/Tcl): Scripting language used by most of the leading EDA chip design tools.
* [Transistor](https://en.wikipedia.org/wiki/Transistor): A semiconductor device used to amplify/switch electronic signals.
* [Verilog](https://en.wikipedia.org/wiki/Verilog): The dominant hardware description language (HDL) for chip design.
* [VLSI](https://en.wikipedia.org/wiki/Very-large-scale_integration): Very large Integrated Circuit (somewhat outdated term, everything is VLSI today).
* [Von Neumann architecture](https://en.wikipedia.org/wiki/Von_Neumann_architecture): Computer architecture in which instructions and data are stored in the same memory.

## Manufacturing


* [BEOL](https://en.wikipedia.org/wiki/Back_end_of_line): Back end of line processing for connecting together devices using metal interconnects.
* [Dicing](https://en.wikipedia.org/wiki/CMOS): Act of cutting up wafer into individual dies.
* [FinFet](https://en.wikipedia.org/wiki/Multigate_device): Non planar, double-gate transistor.
* [Photo-lithography](https://en.wikipedia.org/wiki/Photolithography): Process used in micro-fabrication to pattern parts of a thin film or the bulk of a substrate.
* [Photomasks](https://en.wikipedia.org/wiki/Photomask): Opaque plates with holes or transparencies that allow light to shine through in a defined pattern.
* [Reticle](https://en.wikipedia.org/wiki/Photomask): A set of photomasks used by a stepper to step and print patterns onto a silicon wafer.
* [Semiconductor Fabrication](https://en.wikipedia.org/wiki/Semiconductor_device_fabrication): Process used to create the integrated circuits.
* [Silicon](https://en.wikipedia.org/wiki/Silicon): Element (Si), forms the basis of the electronic revolution.
* [Silicon on insulator](https://en.wikipedia.org/wiki/Silicon_on_insulator): Layered silicon–insulator–silicon with reduced parasitic capacitance.
* [Stepper](https://en.wikipedia.org/wiki/Stepper): Machine that passes light through reticle onto the silicon wafer being processed.
* [TSV](https://en.wikipedia.org/wiki/Through-silicon_via): Vertical electrical connection (via) passing completely through a silicon wafer or die.
* [Wafer](https://en.wikipedia.org/wiki/Wafer_(electronics)): Thin slice of semiconductor material used in electronics for the fabrication of integrated circuits.
* [Wafer thinning](https://en.wikipedia.org/wiki/Wafer_backgrinding): Wafer thickness reduction to allow for stacking and high density packaging.

## Packaging

* [3D IC's](https://en.wikipedia.org/wiki/Three-dimensional_integrated_circuit): The process of stacking integrated circuits and connecting them through TSVs.
* [BGA](https://en.wikipedia.org/wiki/Ball_grid_array): Ball grid array is a type of surface-mount packaging (a chip carrier) used for integrated circuits.
* [BGA substrate](https://en.wikipedia.org/wiki/Ball_grid_array): A miniaturized PCB that mates the silicon die to BGA pins. 
* [Bumping](https://en.wikipedia.org/wiki/Flip_chip): Placing of bumps on wafer/dies in preparation for package assembly.
* [DIMM](http://whatis.techtarget.com/definition/DIMM-dual-in-line-memory-module): Dual in line memory module.
* [Flip-chip](https://en.wikipedia.org/wiki/Flip_chip): Method of bonding a silicon die to package using solder bumps.
* [IC Assembly](https://en.wikipedia.org/wiki/Integrated_circuit_packaging): Semiconductor die is encased in a supporting case "package".
* [Interposer](https://en.wikipedia.org/wiki/Interposer): Electrical interface used to spread a connection to a wider pitch.
* [Heat sink](https://en.wikipedia.org/wiki/Heat_sink): A passive heat exchanger.
* [Heat pipe](https://en.wikipedia.org/wiki/Heat_pipe): Device for efficiently transferring heat between two solid interfaces .
* [KGD](https://en.wikipedia.org/wiki/Wafer_testing): Known Good Die. Dies that have been completely tested at wafer probe.
* [Leadframe](https://en.wikipedia.org/wiki/Lead_frame): Metal structure inside a chip package that carry signals from the die to the outside.
* [POP](https://en.wikipedia.org/wiki/Package_on_package): Package on Package
* [SIP](https://en.wikipedia.org/wiki/System_in_package): System In Package
* [SMT](https://en.wikipedia.org/wiki/Surface-mount_technology): Technique whereby packaged chips are mounted directly onto the PCB surface.
* [Through-hole](https://en.wikipedia.org/wiki/Through-hole_technology): TPackage pins inserted in drilled holes and soldered on opposite side of the board.
* [Wirebond](https://en.wikipedia.org/wiki/Wire_bonding): Method of bonding a silicon die to a package using wires.
* [WSI](https://en.wikipedia.org/wiki/Wafer-scale_integration): Wafer scale integration

## Test

* [Arbitrary Waveform Generator](https://en.wikipedia.org/wiki/Arbitrary_waveform_generator): Electronic instrument used to generate arbitrary signal waveforms.
* [ATE](https://en.wikipedia.org/wiki/Automatic_test_equipment): Automatic Test Equipment for testing integrated circuits.
* [Burn-in](https://en.wikipedia.org/wiki/Burn-in): Process of screening parts for potential premature life time failures.
* [DIB](https://en.wikipedia.org/wiki/DUT_board): Device Interface Board for interfacing DUT to ATE. Also called DUT board, probe card, load board, PIB. 
* [DMM](https://en.wikipedia.org/wiki/Multimeter): Electronic instrument for measuring voltage, current, and resistance.
* [DUT](https://en.wikipedia.org/wiki/Device_under_test): Device under test
* [FIB](https://en.wikipedia.org/wiki/Focused_ion_beam): Focused ion beam
* [JTAG](https://en.wikipedia.org/wiki/Joint_Test_Action_Group): Industry standard for verifying and testing/debugging printed circuit boards after manufacturing.
* [Logic Analyzer](https://en.wikipedia.org/wiki/Logic_analyzer): Electronic instrument for capturing multiple digital signal from a system.
* [MCM](https://en.wikipedia.org/wiki/Multi-chip_module): Multi-chip Module
* [Oscilloscope](https://en.wikipedia.org/wiki/Oscilloscope): Electronic instrument for tracking the change of an electrical signal over time.
* [Probe Card](https://en.wikipedia.org/wiki/Probe_card): A direct interface between electronic test systems and a semiconductor wafer.
* [SEM](https://en.wikipedia.org/wiki/Scanning_electron_microscope): Scanning electron microscope
* [Shmoo Plot](https://en.wikipedia.org/wiki/Shmoo_plot): An ASCII plot of a component response over a range of conditions.
* [Spectrum Analyzer](https://en.wikipedia.org/wiki/Spectrum_analyzer): Electronic instrument for measuring the power of the spectrum of an unknown signal.