adapteva.com Adapteva parallella_i2c 1.0 I2C SCL_I I2C_SCL_I SCL_O I2C_SCL_O SCL_T I2C_SCL_T SDA_I I2C_SDA_I SDA_O I2C_SDA_O SDA_T I2C_SDA_T xilinx_verilogsynthesis Verilog Synthesis verilogSource:vivado.xilinx.com:synthesis verilog parallella_i2c xilinx_verilogsynthesis_view_fileset xilinx_verilogbehavioralsimulation Verilog Simulation verilogSource:vivado.xilinx.com:simulation verilog parallella_i2c xilinx_verilogbehavioralsimulation_view_fileset xilinx_xpgui UI Layout :vivado.xilinx.com:xgui.ui xilinx_xpgui_view_fileset I2C_SDA_I out std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation 0 required I2C_SCL_I out std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation 0 required I2C_SDA inout std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation 0 required I2C_SCL inout std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation 0 required I2C_SDA_O in std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation required I2C_SDA_T in std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation required I2C_SCL_O in std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation required I2C_SCL_T in std_logic xilinx_verilogsynthesis xilinx_verilogbehavioralsimulation required xilinx_verilogsynthesis_view_fileset hdl/parallella_i2c.v verilogSource CHECKSUM_53deb422 xilinx_verilogbehavioralsimulation_view_fileset hdl/parallella_i2c.v verilogSource xilinx_xpgui_view_fileset xgui/parallella_i2c_v1_0.tcl tclSource XGUI_VERSION_2 CHECKSUM_e65e5adf I2C Open-Drain Implementation Component_Name Component Name parallella_i2c_v1_0 zynq /Adapteva parallella_i2c_v1_0 Adapteva, Inc. http://www.adapteva.com 2 2015-01-13T18:14:34Z /mnt/windowsC/Adapteva/Parallella/parallella-hwelink/fpga/src/i2c /mnt/windowsC/Adapteva/Parallella/parallella-hwelink/fpga/src/i2c /mnt/windowsC/Adapteva/Parallella/parallella-hwelink/fpga/src/i2c 2014.3