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oh/asiclib/hdl/asic_oa222.v
aolofsson 289024fd89 Flattening directory tree (again)
- Creating an arbitrary 'src' directory really doesn't help much...
- Goal is to make each folder self contained
- Make meta repos and individual repos have the same directory structure
2022-06-21 14:48:48 -04:00

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624 B
Verilog

//#############################################################################
//# Function: Or-And (oa222) Gate #
//# Copyright: OH Project Authors. ALl rights Reserved. #
//# License: MIT (see LICENSE file in OH repository) #
//#############################################################################
module asic_oa222 #(parameter PROP = "DEFAULT") (
input a0,
input a1,
input b0,
input b1,
input c0,
input c1,
output z
);
assign z = (a0 | a1) & (b0 | b1) & (c0 | c1);
endmodule