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oh
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parallella
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fpga
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headless_e16_z7020
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Ola Jeppsson
a6aba4cd1f
parallella/fpga/headless_e16_z70{1,2}0: Fix Makefile clean target
...
Update for output file name change Signed-off-by: Ola Jeppsson <ola@adapteva.com>
2016-03-11 17:06:25 +01:00
..
bit2bin.bif
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
build.sh
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
dummy.elf
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
Makefile
parallella/fpga/headless_e16_z70{1,2}0: Fix Makefile clean target
2016-03-11 17:06:25 +01:00
parallella_e16_headless_gpiose_7020.bit.bin
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
run.tcl
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
system_bd.tcl
parallella/fpga/headless_e16_z7020: Explicitly set number of GPIOs
2016-03-11 16:31:18 +01:00
system_params.tcl
parallella/fpga: Rename headless to headless_e16_z7020
2016-03-11 16:31:18 +01:00
