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b9d3c5ac5c
~10 real bugs -mostly name mismatches and bit range mistakes
146 lines
5.0 KiB
Verilog
146 lines
5.0 KiB
Verilog
/*
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###########################################################################
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# Function: A mailbox FIFO with a FIFO empty/full flags that can be used as
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# interrupts. Status of the FIFO can be polled.
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#
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# EMBOXLO = lower 32 bits of FIFO entry
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# EMBOXHI = upper 32 bits of FIFO entry
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# EMBSTATUS = status of FIFO [0]=1-->fifo not empty
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# [1]=1-->fifo full
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#
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# Notes: System takes care of not overflowing the FIFO
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# Reading the EMBOXHI causes rd pointer to update to next entry
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# EMBOXLO/EMBOXHI must be consecutive addresses for write.
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# The "embox_not_empty" will stay high as long as there are messages
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#
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# How to use: 1.) Connect "embox_not_empty" to interrupt input line
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# 2.) Write an ISR to respond to interrupt line that:
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# -reads EMBOXLO, then
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# -reads EMBOXHI, then
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# -finishes ISR
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############################################################################
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*/
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module embox (/*AUTOARG*/
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// Outputs
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mi_dout, embox_full, embox_not_empty,
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// Inputs
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reset, clk, mi_en, mi_we, mi_addr, mi_din
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);
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parameter DW = 32; //data width of fifo
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parameter RFAW = 5; //address bus width
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parameter FAW = 4; //fifo entries==2^FAW
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parameter GROUP = 4'h0; //address map group
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/*****************************/
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/*CLOCK AND RESET */
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/*****************************/
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input reset; //synchronous reset
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input clk;
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/*****************************/
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/*SIMPLE MEMORY INTERFACE */
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/*****************************/
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input mi_en;
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input mi_we;
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input [19:0] mi_addr;
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input [DW-1:0] mi_din;
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output [DW-1:0] mi_dout;
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/*****************************/
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/*MAILBOX OUTPUTS */
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/*****************************/
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output embox_full;
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output embox_not_empty;
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/*****************************/
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/*REGISTERS */
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/*****************************/
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reg [DW-1:0] mi_dout;
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reg [DW-1:0] embox_data_reg;
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reg mi_data_sel;
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/*****************************/
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/*WIRES */
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/*****************************/
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wire embox_read;
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wire embox_write;
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wire embox_lo_write;
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wire embox_push_fifo;
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wire embox_pop_fifo;
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wire [2*DW-1:0] embox_fifo_data;
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wire embox_empty;
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/*****************************/
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/*DECODE LOGIC */
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/*****************************/
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//fifo read/write logic
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assign embox_write = mi_en & mi_we;
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assign embox_read = mi_en & ~mi_we;
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//Register write enables
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assign embox_lo_write = embox_write & (mi_addr[RFAW+1:2]==`EMBOXLO); //write to shadow
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assign embox_push_fifo = embox_write & (mi_addr[RFAW+1:2]==`EMBOXHI); //initiates FIFO write
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//read logic
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assign embox_pop_fifo = embox_read & (mi_addr[RFAW+1:2]==`EMBOXHI); //fifo read
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/*****************************/
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/*WRITE ACTION */
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/*****************************/
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//shadow register for writing lower word (32 bit bus)
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always @ (posedge clk)
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if(embox_lo_write)
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embox_data_reg[DW-1:0] <=mi_din[DW-1:0];
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/*****************************/
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/*READ BACK DATA */
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/*****************************/
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always @ (posedge clk)
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if(embox_read)
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case(mi_addr[RFAW+1:2])
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`EMBOXLO: mi_dout[DW-1:0] <= embox_fifo_data[DW-1:0];
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`EMBOXHI: mi_dout[DW-1:0] <= embox_fifo_data[2*DW-1:DW];
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default: mi_dout[DW-1:0] <= 32'd0;
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endcase // case (mi_addr[RFAW-1:2])
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/*****************************/
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/*FIFO (64-BIT) */
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/*****************************/
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assign embox_not_empty = ~embox_empty;
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//BUG! This fifo is currently hard coded to 32 entries
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//Should be parametrized to up to 4096 entries
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fifo_sync #(.DW(64)) mbox(// Outputs
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.rd_data (embox_fifo_data[2*DW-1:0]),
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.rd_empty (embox_empty),
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.wr_full (embox_full),
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// Inputs
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.rd_en (embox_pop_fifo),
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.wr_data ({mi_din[DW-1:0],embox_data_reg[DW-1:0]}),
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.wr_en (embox_push_fifo),
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.clk (clk),
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.reset (reset)
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);
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endmodule // embox
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/*
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Copyright (C) 2014 Adapteva, Inc.
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Contributed by Andreas Olofsson <andreas@adapteva.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.This program is distributed in the hope
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that it will be useful,but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details. You should have received a copy
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of the GNU General Public License along with this program (see the file
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COPYING). If not, see <http://www.gnu.org/licenses/>.
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*/
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