Andreas Olofsson 0d42736914 Implemented enesh memory ...

-not parametrized
-keeping 64 bit wide for now

2015-04-21 17:13:09 -04:00

..

ecfg.v

Message box working...

2015-04-19 21:55:07 -04:00

eclocks.v

Clock cleanup

2015-04-18 16:24:26 -04:00

elink_regmap.v

Message box working...

2015-04-19 21:55:07 -04:00

elink.v

Message box working...

2015-04-19 21:55:07 -04:00

emaxi.v

Integrating emesh memory module

2015-04-20 23:07:13 -04:00

ememory.v

Implemented enesh memory

2015-04-21 17:13:09 -04:00

ereset.v

Cleanup

2015-04-18 16:26:32 -04:00

erx_disty.v

MILESTONE: Open souce simulation elink loopback working!

2015-04-17 15:51:55 -04:00

erx_io.v

Cleanup

2015-04-18 16:26:32 -04:00

erx_protocol.v

Verilator lint cleanup

2015-04-14 14:00:23 -04:00

erx.v

Cleanup

2015-04-18 16:26:32 -04:00

esaxi.v

Integrating emesh memory module

2015-04-20 23:07:13 -04:00

etx_arbiter.v

Bug fix, missing "data hold" stage

2015-04-21 17:10:51 -04:00

etx_io.v

Removed synchronizer on TXLCLK

2015-04-18 16:17:44 -04:00

etx_protocol.v

Man that's a lot of yak shaving....

2015-04-13 23:35:21 -04:00

etx.v

Continued work to create clean design:

2015-04-15 11:54:43 -04:00