1
0
mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00
oh/spi/fpga/run_params.tcl
aolofsson 289024fd89 Flattening directory tree (again)
- Creating an arbitrary 'src' directory really doesn't help much...
- Goal is to make each folder self contained
- Make meta repos and individual repos have the same directory structure
2022-06-21 14:48:48 -04:00

24 lines
440 B
Tcl

#Design name ("system" recommended)
set design system
#Project directory ("." recommended)
set projdir ./
#Device name
set partname "xc7z020clg400-1"
#Paths to all IP blocks to use in Vivado "system.bd"
set ip_repos [list "."]
#All source files
set hdl_files []
#All constraints files
set constraints_files [list \
../../parallella/fpga/parallella_io.xdc \
../../parallella/fpga/parallella_7020_io.xdc \
./axi_spi_timing.xdc \
]