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30 lines
2.1 KiB
Plaintext
30 lines
2.1 KiB
Plaintext
00000000_00000003_810f0200_05_0040 //WRITE (E_RESET): assert reset (and wait!!!)
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00000000_00000000_810f0200_05_0100 // (E_RESET): deassert reset (and wait more!!)
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810D0204_00000001_810f0204_05_0000 // (E_CLK): configure clock
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00000000_00000001_810f0208_05_0000 // (E_CHIPID): write chipid
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00000000_0000AABB_810f020c_05_0000 // (E_VERSION): write version
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00000000_00000000_810f0210_05_0000 // (ETX_CFG): write TX config
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00000000_00000000_810f0214_05_0000 // (ETX_STATUS): write TX config
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00000000_87654321_810f0218_05_0000 // (ETX_GPIO): write tx gpio
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00000000_00000000_810f0300_05_0000 // (ERX_CFG): write to RX config
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00000000_00000000_810f030C_05_0000 // (ERX_OFFSET): offset register
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00000000_76543210_810f0318_05_0000 // (ERX_IDELAY0):idelay register
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00000000_FEDCBA98_810f031C_05_0000 // (ERX_IDELAY1):idelay register
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00000000_76543210_810f0320_05_0000 // (ERX_TESTDATA):test data
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00000000_11111111_810E0000_05_0000 // (ETX_MMU): write to TX mmu
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00000000_22222222_810E0004_05_0000 // (ETX_MMU): write to TX mmu
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00000000_33333333_810E8000_05_0000 // (ERX_MMU): write to RX mmu
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00000000_44444444_810E8004_05_0000 // (ERX_MMU): write to RX mmu
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FEDCBA98_76543210_820f0310_05_0000 // (E_MAILBOXLO): write to mailbox low
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FEDCBA98_76543210_820f0314_05_0000 // (E_MAILBOXHI): write to mailbox low
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810D020C_DEADBEEF_810f020c_04_0000 //READ (E_VERSION): read version
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810D0210_DEADBEEF_810f0210_04_0000 // (ETX_CFG): read config
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810D0214_DEADBEEF_810f0214_04_0000 // (ETX_STATUS): read status
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810D0218_DEADBEEF_810f0218_04_0000 // (ETX_GPIO): read from tx gpio
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810D0300_DEADBEEF_810f0300_04_0000 // (ERX_CFG): read from RX config
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810D0304_DEADBEEF_810f0304_04_0000 // (ERX_STATUS): read from RX status
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810D0308_DEADFEEF_810f0308_04_0000 // (ERX_GPIO): read from RX GPIO
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810D0310_DEADBEEF_810f0310_04_0000 // (E_MAILBOXLO): read from lo mailbox
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810D0314_DEADFEEF_810f0314_04_0000 // (E_MAILBOXHI): read from hi mailbox
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810D0320_DEADBEEF_810f0320_04_0000 // (ERX_TESTDATA): test data
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