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9e9d323025
-Should be ifdef, since this is a global. You will never be doing and not an asic at the same time!
26 lines
919 B
Verilog
26 lines
919 B
Verilog
//#############################################################################
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//# Function: Isolation buffer (HIGH) for multi supply domains #
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//#############################################################################
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//# Author: Andreas Olofsson #
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//# License: MIT (see LICENSE file in OH! repository) #
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//#############################################################################
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module oh_pwr_isohi #(parameter DW = 1 // width of data inputs
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)
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(
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input iso,// active low isolation signal
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input [DW-1:0] in, // input signal
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output [DW-1:0] out // out = iso | in
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);
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`ifdef CFG_ASIC
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asic_iso_hi iiso [DW-1:0] (.iso(iso),
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.in(in[DW-1:0]),
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.out(out[DW-1:0]));
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`else
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assign out[DW-1:0] = {(DW){iso}} | in[DW-1:0];
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`endif
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endmodule // oh_pwr_isohi
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