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oh/xilibs/dv/IOBUF_INTERMDISABLE.v
aolofsson 289024fd89 Flattening directory tree (again)
- Creating an arbitrary 'src' directory really doesn't help much...
- Goal is to make each folder self contained
- Make meta repos and individual repos have the same directory structure
2022-06-21 14:48:48 -04:00

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485 B
Verilog

module IOBUF_INTERMDISABLE (O, IO, I, IBUFDISABLE, INTERMDISABLE, T);
parameter integer DRIVE = 12;
parameter IBUF_LOW_PWR = "TRUE";
parameter IOSTANDARD = "DEFAULT";
parameter SIM_DEVICE = "7SERIES";
parameter SLEW = "SLOW";
parameter USE_IBUFDISABLE = "TRUE";
`ifdef XIL_TIMING
parameter LOC = "UNPLACED";
`endif // `ifdef XIL_TIMING
output O;
inout IO;
input I;
input IBUFDISABLE;
input INTERMDISABLE;
input T;
endmodule