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19 lines
596 B
Verilog
19 lines
596 B
Verilog
//#############################################################################
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//# Function: Positive edge-triggered static D-type flop-flop #
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//# Copyright: OH Project Authors. ALl rights Reserved. #
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//# License: MIT (see LICENSE file in OH repository) #
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//#############################################################################
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module oh_dffq #(parameter DW = 1) // array width
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(
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input [DW-1:0] d,
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input [DW-1:0] clk,
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output reg [DW-1:0] q
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);
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always @ (posedge clk)
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q <= d;
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endmodule
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