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18 lines
600 B
Verilog
18 lines
600 B
Verilog
//#############################################################################
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//# Function: 3-Input Exclusive-Or Gate #
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//# Copyright: OH Project Authors. ALl rights Reserved. #
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//# License: MIT (see LICENSE file in OH repository) #
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//#############################################################################
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module oh_xor3 #(parameter DW = 1 ) // array width
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(
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input [DW-1:0] a,
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input [DW-1:0] b,
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input [DW-1:0] c,
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output [DW-1:0] z
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);
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assign z = a ^ b ^ c;
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endmodule
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