Andreas Olofsson 559ffcc6e0 File name changes and additions

2015-05-17 22:34:42 -04:00

..

elink_pins.xdc

Name change

2015-05-17 22:32:39 -04:00

elink_timing.xdc

Adding input delay constraints for RX

2015-05-17 22:33:42 -04:00

read_constraints.tcl

First version of synthesis tcl scripts for elink example

2015-05-07 23:43:05 -04:00

read_ip.tcl

First version of synthesis tcl scripts for elink example

2015-05-07 23:43:05 -04:00

read_verilog.tcl

File name changes and additions

2015-05-17 22:34:42 -04:00

run.tcl

First version of synthesis tcl scripts for elink example

2015-05-07 23:43:05 -04:00