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Ola Jeppsson 5e16c906f7 Update README

Add (work-in-progress) build instructions.

Signed-off-by: Ola Jeppsson <ola@adapteva.com>

2015-07-05 23:32:28 +02:00

common

Changing default to simplify instantiation

2015-05-14 22:46:23 -04:00

edma

Making reset sync in emmu

2015-05-23 22:26:15 -04:00

elink

elink: Convert package_axi_elink to use helper script

2015-07-05 19:43:32 +02:00

emailbox

Fifo cleanup

2015-07-02 16:59:38 -04:00

emesh

Fifo cleanup

2015-07-02 16:59:38 -04:00

emmu

Making reset sync in emmu

2015-05-23 22:26:15 -04:00

include

Add ip generation helper script

2015-07-05 19:40:30 +02:00

memory

Fifo cleanup

2015-07-02 16:59:38 -04:00

parallella/package/xilinx

Adding parallella block design

2015-05-22 21:38:39 -04:00

projects/axi_elink

change path

2015-07-02 14:53:21 +02:00

xilibs

Fifo cleanup

2015-07-02 16:59:38 -04:00

.gitignore

Adding register access from RX

2015-04-27 23:51:00 -04:00

configure

Add configure script

2015-07-05 23:30:55 +02:00

CONTRIBUTING.md

Basic infrastructure

2015-04-21 21:36:37 -04:00

COPYING

Basic infrastructure

2015-04-21 21:36:37 -04:00

Makefile.in

Add configure script

2015-07-05 23:30:55 +02:00

README.md

Update README

2015-07-05 23:32:28 +02:00

README.md

=======

OH!

Open Hardware (Pure and Simple)

(work in progress...)

Building

git clone https://github.com/parallella/oh.git
cd oh
mkdir build
cd build
../configure
make elink

Languages

Verilog 81.1%

Tcl 10.7%

C 5.6%

Shell 0.8%

Python 0.6%

Other 1.2%