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20 lines
394 B
Verilog
20 lines
394 B
Verilog
module IOBUFDS (O, IO, IOB, I, T);
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`ifdef XIL_TIMING
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parameter LOC = "UNPLACED";
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`endif // `ifdef XIL_TIMING
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parameter DIFF_TERM = "FALSE";
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parameter DQS_BIAS = "FALSE";
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parameter IBUF_LOW_PWR = "TRUE";
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parameter IOSTANDARD = "DEFAULT";
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parameter SLEW = "SLOW";
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localparam MODULE_NAME = "IOBUFDS";
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output O;
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inout IO, IOB;
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input I, T;
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endmodule
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