mirror of
https://github.com/aolofsson/oh.git
synced 2025-01-17 20:02:53 +08:00
c41a0a8640
-All files still GPLv3 -Placed at the bottom of the file (I am tired of looking at them!)
29 lines
419 B
Verilog
29 lines
419 B
Verilog
module memory_dp_48x4096 (/*AUTOARG*/
|
|
// Outputs
|
|
doutb,
|
|
// Inputs
|
|
clka, ena, wea, addra, dina, clkb, enb, addrb
|
|
);
|
|
|
|
|
|
//write
|
|
input clka;
|
|
input ena;
|
|
input [5:0] wea;
|
|
input [11:0] addra;
|
|
input [47:0] dina;
|
|
|
|
//read
|
|
input clkb;
|
|
input enb;
|
|
input [11:0] addrb;
|
|
output [47:0] doutb;
|
|
|
|
assign doutb[47:0]=48'b0;
|
|
|
|
endmodule // memory_dp_48x4096
|
|
|
|
|
|
|
|
|