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171 lines
4.4 KiB
Verilog
171 lines
4.4 KiB
Verilog
//CSA34:2 Compressor
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module oh_csa34to2 (/*AUTOARG*/
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// Outputs
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s, c, c_out0, c_out1, c_out2, c_out3, c_out4, c_out5, c_out6,
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c_out7, c_out8, c_out9, c_out10, c_out11, c_out12, c_out13,
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c_out14, c_out15, c_out16, c_out17, c_out18, c_out19, c_out20,
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c_out21, c_out22, c_out23, c_out24, c_out25, c_out26, c_out27,
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c_out28, c_out29, c_out30,
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// Inputs
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in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11, in12,
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in13, in14, in15, in16, in17, in18, in19, in20, in21, in22, in23,
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in24, in25, in26, in27, in28, in29, in30, in31, in32, in33, c_in0,
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c_in1, c_in2, c_in3, c_in4, c_in5, c_in6, c_in7, c_in8, c_in9,
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c_in10, c_in11, c_in12, c_in13, c_in14, c_in15, c_in16, c_in17,
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c_in18, c_in19, c_in20, c_in21, c_in22, c_in23, c_in24, c_in25,
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c_in26, c_in27, c_in28, c_in29, c_in30
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);
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input in0;
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input in1;
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input in2;
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input in3;
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input in4;
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input in5;
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input in6;
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input in7;
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input in8;
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input in9;
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input in10;
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input in11;
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input in12;
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input in13;
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input in14;
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input in15;
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input in16;
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input in17;
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input in18;
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input in19;
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input in20;
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input in21;
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input in22;
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input in23;
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input in24;
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input in25;
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input in26;
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input in27;
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input in28;
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input in29;
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input in30;
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input in31;
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input in32;
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input in33;
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input c_in0;
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input c_in1;
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input c_in2;
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input c_in3;
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input c_in4;
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input c_in5;
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input c_in6;
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input c_in7;
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input c_in8;
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input c_in9;
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input c_in10;
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input c_in11;
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input c_in12;
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input c_in13;
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input c_in14;
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input c_in15;
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input c_in16;
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input c_in17;
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input c_in18;
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input c_in19;
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input c_in20;
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input c_in21;
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input c_in22;
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input c_in23;
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input c_in24;
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input c_in25;
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input c_in26;
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input c_in27;
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input c_in28;
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input c_in29;
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input c_in30;
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output s;
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output c;
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output c_out0;
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output c_out1;
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output c_out2;
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output c_out3;
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output c_out4;
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output c_out5;
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output c_out6;
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output c_out7;
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output c_out8;
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output c_out9;
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output c_out10;
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output c_out11;
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output c_out12;
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output c_out13;
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output c_out14;
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output c_out15;
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output c_out16;
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output c_out17;
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output c_out18;
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output c_out19;
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output c_out20;
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output c_out21;
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output c_out22;
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output c_out23;
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output c_out24;
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output c_out25;
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output c_out26;
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output c_out27;
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output c_out28;
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output c_out29;
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output c_out30;
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wire s_int0;
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wire s_int1;
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wire s_int2;
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wire s_int3;
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oh_csa92 csa92_00 (.in0(in0), .in1(in1), .in2(in2),
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.in3(in3), .in4(in4), .in5(in5),
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.in6(in6), .in7(in7), .in8(in8),
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.c_in0(c_in0), .c_in1(c_in1), .c_in2(c_in2),
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.c_in3(c_in3), .c_in4(c_in4), .c_in5(c_in5),
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.c_out0(c_out0),.c_out1(c_out1),.c_out2(c_out2),
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.c_out3(c_out3),.c_out4(c_out4),.c_out5(c_out5),
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.c(c_out21), .s(s_int0));
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oh_csa92 csa92_01 (.in0(in9), .in1(in10), .in2(in11),
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.in3(in12), .in4(in13), .in5(in14),
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.in6(in15), .in7(in16), .in8(in17),
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.c_in0(c_in6), .c_in1(c_in7), .c_in2(c_in8),
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.c_in3(c_in9), .c_in4(c_in10), .c_in5(c_in11),
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.c_out0(c_out6),.c_out1(c_out7), .c_out2(c_out8),
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.c_out3(c_out9),.c_out4(c_out10),.c_out5(c_out11),
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.c(c_out22), .s(s_int1));
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oh_csa92 csa92_02 (.in0(in18), .in1(in19), .in2(in20),
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.in3(in21), .in4(in22), .in5(in23),
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.in6(in24), .in7(in25), .in8(in26),
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.c_in0(c_in12), .c_in1(c_in13), .c_in2(c_in14),
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.c_in3(c_in15), .c_in4(c_in16), .c_in5(c_in17),
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.c_out0(c_out12),.c_out1(c_out13),.c_out2(c_out14),
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.c_out3(c_out15),.c_out4(c_out16),.c_out5(c_out17),
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.c(c_out23), .s(s_int2));
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oh_csa62 csa62_03 (.in0(in27), .in1(in28), .in2(in29),
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.in3(in30), .in4(in31), .in5(in32),
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.c_in0(c_in18), .c_in1(c_in19), .c_in2(c_in20),
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.c_out0(c_out18),.c_out1(c_out19),.c_out2(c_out20),
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.c(c_out24),.s(s_int3));
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oh_csa92 csa92_10 (.in0(in33), .in1(s_int0), .in2(s_int1),
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.in3(s_int2), .in4(s_int3), .in5(c_in21),
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.in6(c_in22), .in7(c_in23), .in8(c_in24),
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.c_in0(c_in25), .c_in1(c_in26), .c_in2(c_in27),
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.c_in3(c_in28), .c_in4(c_in29), .c_in5(c_in30),
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.c_out0(c_out25),.c_out1(c_out26),.c_out2(c_out27),
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.c_out3(c_out28),.c_out4(c_out29),.c_out5(c_out30),
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.c(c), .s(s));
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endmodule // oh_csa34to2
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