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846bfa3357
-adding reset signals to synchronizer to solve startup issues -setting config in test bench for speedup, default reg config now correct -fix (my) stupid bug in etx_arbiter -adding reset to fifo (todo: review this!) -reviewing "all red" from waveforms is a must. Red (x) on data is ok, but leaving them on control signals is asking for trouble. Better safe than sorry when it comes to reset.
##DIRECTORY STRUCTURE
- elink: Top level elink block
- axi: Master and slave interface for elink
- common: Various reusable blocks
- eclock: Drives all clocks for elink and epiphany
- ecfg: Configuration register file for the elink
- gpio: GPIO block
- i2c: I2C wrapper
- etx: The elink transmitter logic
- erx: The elink receiver logic
- memory: Memory wrappers
- emmu: Memory management unit
- embox: Mailbox with interrupts
##DIRECTORY CONTENT Each block should be considered a reusabel entitity and include hdl source code as well as a basic test environment.