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https://github.com/aolofsson/oh.git
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846bfa3357
-adding reset signals to synchronizer to solve startup issues -setting config in test bench for speedup, default reg config now correct -fix (my) stupid bug in etx_arbiter -adding reset to fifo (todo: review this!) -reviewing "all red" from waveforms is a must. Red (x) on data is ok, but leaving them on control signals is asking for trouble. Better safe than sorry when it comes to reset.
96 lines
2.6 KiB
Verilog
96 lines
2.6 KiB
Verilog
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module fifo_empty_block (/*AUTOARG*/
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// Outputs
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rd_fifo_empty, rd_addr, rd_gray_pointer,
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// Inputs
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reset, rd_clk, rd_wr_gray_pointer, rd_read
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);
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parameter AW = 2; // Number of bits to access all the entries
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//##########
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//# INPUTS
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//##########
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input reset;
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input rd_clk;
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input [AW:0] rd_wr_gray_pointer;//from other clock domain
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input rd_read;
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//###########
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//# OUTPUTS
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//###########
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output rd_fifo_empty;
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output [AW-1:0] rd_addr;
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output [AW:0] rd_gray_pointer;
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//#########
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//# REGS
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//#########
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reg [AW:0] rd_gray_pointer;
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reg [AW:0] rd_binary_pointer;
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reg rd_fifo_empty;
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//##########
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//# WIRES
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//##########
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wire rd_fifo_empty_next;
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wire [AW:0] rd_binary_next;
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wire [AW:0] rd_gray_next;
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//Counter States
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always @(posedge rd_clk or posedge reset)
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if(reset)
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begin
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rd_binary_pointer[AW:0] <= {(AW+1){1'b0}};
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rd_gray_pointer[AW:0] <= {(AW+1){1'b0}};
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end
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else if(rd_read)
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begin
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rd_binary_pointer[AW:0] <= rd_binary_next[AW:0];
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rd_gray_pointer[AW:0] <= rd_gray_next[AW:0];
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end
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//Read Address
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assign rd_addr[AW-1:0] = rd_binary_pointer[AW-1:0];
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//Updating binary pointer
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assign rd_binary_next[AW:0] = rd_binary_pointer[AW:0] +
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{{(AW){1'b0}},rd_read};
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//Gray Pointer Conversion (for more reliable synchronization)!
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assign rd_gray_next[AW:0] = {1'b0,rd_binary_next[AW:1]} ^
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rd_binary_next[AW:0];
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//# FIFO empty indication
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assign rd_fifo_empty_next = (rd_gray_next[AW:0]==rd_wr_gray_pointer[AW:0]);
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always @ (posedge rd_clk or posedge reset)
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if(reset)
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rd_fifo_empty <= 1'b1;
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else
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rd_fifo_empty <= rd_fifo_empty_next;
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endmodule // fifo_empty_block
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/*
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Copyright (C) 2013 Adapteva, Inc.
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Contributed by Andreas Olofsson, Roman Trogan <support@adapteva.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program (see the file COPYING). If not, see
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<http://www.gnu.org/licenses/>.
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*/
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