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64 lines
1.8 KiB
Markdown
64 lines
1.8 KiB
Markdown
Mini-IO: A lightweight parallel interface
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=============================================
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## Introduction
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* Mini-IO (MIO) is a generic protocol agnostic link for moving data between chips (or silicon dies).
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## Key Features
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* Dual data rate data transfers
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* Source synchronous
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* Clock aligned by transmitter at 90 degrees
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* Parametrized I/O and system side bus width
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* Data transmitted MSB first
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## Protocol
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![alt tag](docs/c2c_waveform.png)
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## Interface
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| SIGNAL | DIR| DESCRIPTION
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| -------------------|----|--------------
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| access_in | I | Valid packet for TX
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| data_in | I | Data for TX
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| wait_out | O | Pushback from TX towards core side
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| access_out | I | Valid packet from RX
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| data_out | I | Data from RX
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| wait_in | O | Pushback for RX from core side
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| tx_access | O | TX packet framing signal
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| tx_clk | O | TX clock aligned in the center of the data eye
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| tx_data | I | TX DDR data
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| tx_wait | I | TX pushback from RX
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| rx_access | I | RX packet framing signal
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| rx_clk | I | RX center aligned clock
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| rx_data | I | RX DDR data
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| rx_wait | O | RX pushback for TX
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| clk | I | Core side clock
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| nreset | I | Active low async reset
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| io_clk | I | Clock for transmit side
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| datasize | I | Size of data to transmit (<PW)
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| divcfg[3:0] | I | Divider setting for TX clock divider
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## Top level file
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* c2c.v
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## Parameters
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* `CFG_MIOPW : System interface packet width
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* `CFG_MIOW : IO data width (number of data pins)
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## Registers
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* None
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## Simulation
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```
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cd $OH_HOME/mio/dv
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./build.sh
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./run.sh dut_mio.bin tests/test_random.emf
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```
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