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28 lines
544 B
Markdown
28 lines
544 B
Markdown
P1600: 7010 + 0 GPIO
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P1601: 7010 + 24 GPIO
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P1602: 7020 + 48 GPIO
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A101010: 7010 + 0 GPIO
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A101020: 7010 + 24 GPIO
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A101040: 7020 + 48 GPIO
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parallella_headless.tcl --product number as argument
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parallella_display.tcl
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parallella_sdr.tcl
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----
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## EDITING SYSTEM>BD IN GUI (ONE TIME..)
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1. create ports
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2. connect wires
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3. run connection automation
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4. create memory map
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5. validate_bd_design
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6. write_bd_tcl ./system_bd.tcl
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----
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## DESIGN LOOP
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1. Make verilog change..
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2. cd parallella_base; ./build.sh
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3. cd ../headless;; ./build.sh
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4. profit
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