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oh/elink/projects/xilinx/elink_pins.xdc
Andreas Olofsson 21686d31cc Reorg for xilinx projects
-making more modular
-still need to clean up duplucate files
2015-08-08 12:29:00 -04:00

87 lines
4.0 KiB
Tcl

#BANK SELECT
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
#SETTING SIGNAL STANDARDS
set_property IOSTANDARD LVDS_25 [get_ports {rxi*}]
set_property IOSTANDARD LVDS_25 [get_ports {rxo*}]
set_property IOSTANDARD LVDS_25 [get_ports {txi_wr_wait_*}]
set_property IOSTANDARD LVCMOS25 [get_ports {txi_rd_wait_*}]
set_property IOSTANDARD LVDS_25 [get_ports {txo*}]
set_property IOSTANDARD LVDS_25 [get_ports {cclk*}]
set_property IOSTANDARD LVCMOS25 [get_ports {start}]
set_property IOSTANDARD LVCMOS25 [get_ports {chipid}]
set_property IOSTANDARD LVCMOS25 [get_ports {chip_resetb}]
set_property IOSTANDARD LVCMOS25 [get_ports {reset}]
set_property IOSTANDARD LVDS_25 [get_ports {sys_clk*}]
set_property IOSTANDARD LVDS_25 [get_ports {clkin_*}]
#####################
# Epiphany Interface
#####################
set_property PACKAGE_PIN H16 [get_ports {cclk_p}]
set_property PACKAGE_PIN H17 [get_ports {cclk_n}]
set_property PACKAGE_PIN G14 [get_ports {chip_resetb}]
set_property PACKAGE_PIN F16 [get_ports {txo_lclk_p}]
set_property PACKAGE_PIN F17 [get_ports {txo_lclk_n}]
set_property PACKAGE_PIN B19 [get_ports {txo_data_p[0]}]
set_property PACKAGE_PIN A20 [get_ports {txo_data_n[0]}]
set_property PACKAGE_PIN C20 [get_ports {txo_data_p[1]}]
set_property PACKAGE_PIN B20 [get_ports {txo_data_n[1]}]
set_property PACKAGE_PIN D19 [get_ports {txo_data_p[2]}]
set_property PACKAGE_PIN D20 [get_ports {txo_data_n[2]}]
set_property PACKAGE_PIN E18 [get_ports {txo_data_p[3]}]
set_property PACKAGE_PIN E19 [get_ports {txo_data_n[3]}]
set_property PACKAGE_PIN E17 [get_ports {txo_data_p[4]}]
set_property PACKAGE_PIN D18 [get_ports {txo_data_n[4]}]
set_property PACKAGE_PIN F19 [get_ports {txo_data_p[5]}]
set_property PACKAGE_PIN F20 [get_ports {txo_data_n[5]}]
set_property PACKAGE_PIN G17 [get_ports {txo_data_p[6]}]
set_property PACKAGE_PIN G18 [get_ports {txo_data_n[6]}]
set_property PACKAGE_PIN G19 [get_ports {txo_data_p[7]}]
set_property PACKAGE_PIN G20 [get_ports {txo_data_n[7]}]
set_property PACKAGE_PIN H15 [get_ports {txo_frame_p}]
set_property PACKAGE_PIN G15 [get_ports {txo_frame_n}]
set_property PACKAGE_PIN J15 [get_ports {txi_rd_wait_p}]
set_property PACKAGE_PIN J18 [get_ports {txi_wr_wait_p}]
set_property PACKAGE_PIN H18 [get_ports {txi_wr_wait_n}]
set_property PACKAGE_PIN K17 [get_ports {rxi_lclk_p}]
set_property PACKAGE_PIN K18 [get_ports {rxi_lclk_n}]
set_property PACKAGE_PIN K19 [get_ports {rxi_data_p[0]}]
set_property PACKAGE_PIN J19 [get_ports {rxi_data_n[0]}]
set_property PACKAGE_PIN L14 [get_ports {rxi_data_p[1]}]
set_property PACKAGE_PIN L15 [get_ports {rxi_data_n[1]}]
set_property PACKAGE_PIN L16 [get_ports {rxi_data_p[2]}]
set_property PACKAGE_PIN L17 [get_ports {rxi_data_n[2]}]
set_property PACKAGE_PIN M14 [get_ports {rxi_data_p[3]}]
set_property PACKAGE_PIN M15 [get_ports {rxi_data_n[3]}]
set_property PACKAGE_PIN L19 [get_ports {rxi_data_p[4]}]
set_property PACKAGE_PIN L20 [get_ports {rxi_data_n[4]}]
set_property PACKAGE_PIN M19 [get_ports {rxi_data_p[5]}]
set_property PACKAGE_PIN M20 [get_ports {rxi_data_n[5]}]
set_property PACKAGE_PIN M17 [get_ports {rxi_data_p[6]}]
set_property PACKAGE_PIN M18 [get_ports {rxi_data_n[6]}]
set_property PACKAGE_PIN N15 [get_ports {rxi_data_p[7]}]
set_property PACKAGE_PIN N16 [get_ports {rxi_data_n[7]}]
set_property PACKAGE_PIN J20 [get_ports {rxi_frame_p}]
set_property PACKAGE_PIN H20 [get_ports {rxi_frame_n}]
set_property PACKAGE_PIN K14 [get_ports {rxo_rd_wait_p}]
set_property PACKAGE_PIN J14 [get_ports {rxo_rd_wait_n}]
set_property PACKAGE_PIN K16 [get_ports {rxo_wr_wait_p}]
set_property PACKAGE_PIN J16 [get_ports {rxo_wr_wait_n}]
#####################
# Dummy (only for example)
#####################
#MRCC
set_property PACKAGE_PIN U18 [get_ports {clkin_p}]
set_property PACKAGE_PIN U19 [get_ports {clkin_n}]
set_property PACKAGE_PIN U14 [get_ports {sys_clk_p}]
set_property PACKAGE_PIN U15 [get_ports {sys_clk_p}]
set_property PACKAGE_PIN U12 [get_ports {start}]
set_property PACKAGE_PIN U13 [get_ports {reset}]