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44 lines
1.5 KiB
Verilog
44 lines
1.5 KiB
Verilog
//MEMORY MAP
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//[31:20] = LINKID
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//[19:16] = GROUP SELECT
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//[15] = MMU SELECT (for RX/TX)
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//[14:6] = USED BY MMU ONLY
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//[5:2] = REGISTER ADDRESS (0..15)
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//[1:0] = IGNORED (no byte access)
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//Link register groups addr[19:16]
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`define EGROUP_CFG 4'hE
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`define EGROUP_TX 4'hD
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`define EGROUP_RX 4'hC
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`define EGROUP_READTAG 4'hB
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//ELINK CONFIG REGISTERS
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`define ELRESET 4'h0 //E0000-reset
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`define ELCLK 4'h1 //E0004-clock configuration
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`define ELCHIPID 4'h2 //E0008-Epiphany chip id for colid/rowid pins
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`define ELVERSION 4'h3 //E000C-version
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//ELINK TX registers
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`define ELTXCFG 4'h0 //D0000-config
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`define ELTXSTATUS 4'h1 //D0004-tx status
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`define ELTXGPIO 4'h2 //D0008-direct data for tx pins
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`define ELTXTEST 4'h3 //D000C-control for driving SERDES directly
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`define ELTXDSTADDR 4'h5 //D0014-static addr (for testing)
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`define ELTXDATA 4'h4 //D0010-static data (for testing)
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`define ELTXSRCADDR 4'h6 //D0014-static source addr (for testing)
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//ELINK RX registers
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`define ELRXCFG 4'h0 //C0000-config
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`define ELRXSTATUS 4'h1 //C0004-status register
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`define ELRXGPIO 4'h2 //C0008-sampled data
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`define ELRXBASE 4'h3 //C000c-memory base for remap
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`define EMAILBOXLO 4'h4 //C0010-mailbox
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`define EMAILBOXHI 4'h5 //C0014-mailbox
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`define EDMACFG 4'h6 //C0018-dma
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`define EDMASTATUS 4'h7 //C001C-dma
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`define EDMASRC 4'h8 //C0020-dma
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`define EDMADST 4'h9 //C0024-dma
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`define EDMACOUNT 4'hA //C0028-dma
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