Andreas Olofsson b4daf73157 Optimizing clock path ...

* Sven's help!
* Better to use bufio to keep all paths internal, more determenistic path

2015-11-03 14:15:09 -05:00

..

axi_elink

Optimizing clock path

2015-11-03 14:15:09 -05:00

elink_clocks.xdc

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

elink_pins.xdc

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

elink_timing.xdc

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

package_axi_elink.tcl

Reorg for xilinx projects

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package_elink.tcl

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

read_constraints.tcl

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

read_ip.tcl

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

read_verilog.tcl

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00

run.tcl

Reorg for xilinx projects

2015-08-08 12:29:00 -04:00