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OH! : Open Hardware for FPGA and ASIC designers

CONTENT

Module	Description
accelerator	A simple accelerator tutorial
common	Library of generally useful components
emesh	Emesh interface utility circuits
elink	Point to point LVDS link
emailbox	Simple mailbox with interrupt output
emmu	Simple memory transaction translation unit
xilibs	Simulation modules for Xilinx primitives

LICENSE

The OH! repository source code is licensed under the MIT license unless otherwise specified. See LICENSE for MIT copyright terms. Design specific licenses can be found in the folder root (eg: aes/LICENSE)

CONTRIBUTING

Instructions for contributing can be found HERE.

RECOMMEND TOOLS

• Verilator Simulator
• Emacs Verilog Mode
• Icarus Simulator
• GTKWave
• Verilog-Perl

RECOMMENDED READING

• Verilog Quick Reference
• Sunburst Design Verilog Papers
• Sutherland Verilog Papers

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