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mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00
oh/common
Andreas Olofsson fd7aff5dd8 Fixing warning messages in chip synthesis tool
- Don't fight the tools
- No way to remove these warnings and I don't want to have to tell everyone to include maging "don't output this kind of warning flags" that are global to a project...that's just bad practice.
- Didn't take many minutes to remove these warnings and now synthesis runs through with 0 warnings ... much cleaner.. inspires more confidence
2016-02-12 11:04:52 -05:00
..
2016-01-24 23:42:06 -05:00
2016-01-20 21:46:48 -05:00
2016-01-11 17:35:15 -05:00

Name Done Function
oh_rsync Y Reset synchronzation circuit
oh_dsync Y Data synchronizizer
oh_mux{N} Y Various one-hot muxes
oh_edgealign Y Aligns slow pulse to fast clock
oh_pulse2pulse Y Converts fast pulse to slow pulse
oh_stretcher Y Stetches a pulse
oh_clockdiv N Clock divider
oh_arbiter N Configurable arbiter
oh_fifo_sync Y FIFO with same rd/wr clocks
oh_fifo_async Y FIFO with seaprate rd/wr clocks
oh_fifo_cdc Y Clock domain crossing FIFO
oh_memory_sp Y Single ported memory
oh_memory_dp Y Dual ported memory
oh_standby Y Low power standby circuit
oh_clockgate Y Low power clock gating circuit
oh_datagate Y Low power data gating circuit
oh_lat0 Y Latch (active low)
oh_lat1 Y Latch (active high)
oh_add Y Binary adder
oh_csa32 Y Full adder
oh_csa42 Y CSA4:2 Compressor
oh_abs N Absolute value circuit
oh_shifter N Bonary shifter
oh_bin2gray N Binary to gray converter
oh_gray2bin N Gray to binary converter
oh_counter N Multi-type counter
oh_crc N CRC generator
oh_par2ser N Parallel to serial converter
oh_ser2par N Serial to parallel converter