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8 lines
252 B
Verilog
8 lines
252 B
Verilog
//These constants are mutually exclusive
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`define TARGET_CLEAN
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`define CFG_FAKECLK 1 /*verilator doesn't get clock gating*/
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`define CFG_AW 32
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`define CFG_DW 32
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`define CFG_LW 8
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`define CFG_NW 13 /*Number of bytes in the transmission*/
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